Lines Matching defs:val
314 static inline void edma_write(struct edma_cc *ecc, int offset, int val)
316 __raw_writel(val, ecc->base + offset);
322 unsigned val = edma_read(ecc, offset);
324 val &= and;
325 val |= or;
326 edma_write(ecc, offset, val);
331 unsigned val = edma_read(ecc, offset);
333 val &= and;
334 edma_write(ecc, offset, val);
339 unsigned val = edma_read(ecc, offset);
341 val |= or;
342 edma_write(ecc, offset, val);
352 unsigned val)
354 edma_write(ecc, offset + (i << 2), val);
376 int j, unsigned val)
378 edma_write(ecc, offset + ((i * 2 + j) << 2), val);
393 unsigned val)
395 edma_write(ecc, EDMA_SHADOW0 + offset, val);
399 int i, unsigned val)
401 edma_write(ecc, EDMA_SHADOW0 + offset + (i << 2), val);
411 int param_no, unsigned val)
413 edma_write(ecc, EDMA_PARM + offset + (param_no << 5), val);
1653 unsigned int val;
1678 val = edma_read_array(ecc, EDMA_EMR, j);
1679 if (!val)
1682 dev_dbg(ecc->dev, "EMR%d 0x%08x\n", j, val);
1683 emr = val;
1697 val = edma_read(ecc, EDMA_QEMR);
1698 if (val) {
1699 dev_dbg(ecc->dev, "QEMR 0x%02x\n", val);
1701 edma_write(ecc, EDMA_QEMCR, val);
1702 edma_shadow0_write(ecc, SH_QSECR, val);
1705 val = edma_read(ecc, EDMA_CCERR);
1706 if (val) {
1707 dev_warn(ecc->dev, "CCERR 0x%08x\n", val);
1709 edma_write(ecc, EDMA_CCERRCLR, val);