Lines Matching refs:tdma_ch_write
180 static inline void tdma_ch_write(struct tegra_adma_chan *tdc, u32 reg, u32 val)
325 tdma_ch_write(tdc, ADMA_CH_INT_CLEAR, status);
335 tdma_ch_write(tdc, ADMA_CH_CMD, 0);
373 tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc);
374 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
375 tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr);
376 tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr);
377 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);
378 tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config);
381 tdma_ch_write(tdc, ADMA_CH_CMD, 1);
462 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
483 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl);
768 tdma_ch_write(tdc, ADMA_CH_TC, ch_reg->tc);
769 tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_reg->src_addr);
770 tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_reg->trg_addr);
771 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_reg->ctrl);
772 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);
773 tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_reg->config);
774 tdma_ch_write(tdc, ADMA_CH_CMD, ch_reg->cmd);