Lines Matching defs:tdma
133 struct tegra_adma *tdma;
170 static inline void tdma_write(struct tegra_adma *tdma, u32 reg, u32 val)
172 writel(val, tdma->base_addr + tdma->cdata->global_reg_offset + reg);
175 static inline u32 tdma_read(struct tegra_adma *tdma, u32 reg)
177 return readl(tdma->base_addr + tdma->cdata->global_reg_offset + reg);
203 return tdc->tdma->dev;
221 static int tegra_adma_init(struct tegra_adma *tdma)
227 tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
230 tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
234 tdma->base_addr +
235 tdma->cdata->global_reg_offset +
242 tdma_write(tdma, ADMA_GLOBAL_CMD, 1);
250 struct tegra_adma *tdma = tdc->tdma;
256 if (sreq_index > tdma->cdata->ch_req_max) {
257 dev_err(tdma->dev, "invalid DMA request\n");
263 if (test_and_set_bit(sreq_index, &tdma->tx_requests_reserved)) {
264 dev_err(tdma->dev, "DMA request reserved\n");
270 if (test_and_set_bit(sreq_index, &tdma->rx_requests_reserved)) {
271 dev_err(tdma->dev, "DMA request reserved\n");
277 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n",
290 struct tegra_adma *tdma = tdc->tdma;
297 clear_bit(tdc->sreq_index, &tdma->tx_requests_reserved);
301 clear_bit(tdc->sreq_index, &tdma->rx_requests_reserved);
305 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n",
563 const struct tegra_adma_chip_data *cdata = tdc->tdma->cdata;
688 struct tegra_adma *tdma = ofdma->of_dma_data;
699 dev_err(tdma->dev, "DMA request must not be 0\n");
703 chan = dma_get_any_slave_channel(&tdma->dma_dev);
715 struct tegra_adma *tdma = dev_get_drvdata(dev);
720 tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD);
721 if (!tdma->global_cmd)
724 for (i = 0; i < tdma->nr_channels; i++) {
725 tdc = &tdma->channels[i];
740 clk_disable_unprepare(tdma->ahub_clk);
747 struct tegra_adma *tdma = dev_get_drvdata(dev);
752 ret = clk_prepare_enable(tdma->ahub_clk);
757 tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd);
759 if (!tdma->global_cmd)
762 for (i = 0; i < tdma->nr_channels; i++) {
763 tdc = &tdma->channels[i];
820 struct tegra_adma *tdma;
830 tdma = devm_kzalloc(&pdev->dev,
831 struct_size(tdma, channels, cdata->nr_channels),
833 if (!tdma)
836 tdma->dev = &pdev->dev;
837 tdma->cdata = cdata;
838 tdma->nr_channels = cdata->nr_channels;
839 platform_set_drvdata(pdev, tdma);
842 tdma->base_addr = devm_ioremap_resource(&pdev->dev, res);
843 if (IS_ERR(tdma->base_addr))
844 return PTR_ERR(tdma->base_addr);
846 tdma->ahub_clk = devm_clk_get(&pdev->dev, "d_audio");
847 if (IS_ERR(tdma->ahub_clk)) {
849 return PTR_ERR(tdma->ahub_clk);
852 INIT_LIST_HEAD(&tdma->dma_dev.channels);
853 for (i = 0; i < tdma->nr_channels; i++) {
854 struct tegra_adma_chan *tdc = &tdma->channels[i];
856 tdc->chan_addr = tdma->base_addr + cdata->ch_base_offset
865 vchan_init(&tdc->vc, &tdma->dma_dev);
867 tdc->tdma = tdma;
878 ret = tegra_adma_init(tdma);
882 dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
883 dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
884 dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
886 tdma->dma_dev.dev = &pdev->dev;
887 tdma->dma_dev.device_alloc_chan_resources =
889 tdma->dma_dev.device_free_chan_resources =
891 tdma->dma_dev.device_issue_pending = tegra_adma_issue_pending;
892 tdma->dma_dev.device_prep_dma_cyclic = tegra_adma_prep_dma_cyclic;
893 tdma->dma_dev.device_config = tegra_adma_slave_config;
894 tdma->dma_dev.device_tx_status = tegra_adma_tx_status;
895 tdma->dma_dev.device_terminate_all = tegra_adma_terminate_all;
896 tdma->dma_dev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
897 tdma->dma_dev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
898 tdma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
899 tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
900 tdma->dma_dev.device_pause = tegra_adma_pause;
901 tdma->dma_dev.device_resume = tegra_adma_resume;
903 ret = dma_async_device_register(&tdma->dma_dev);
910 tegra_dma_of_xlate, tdma);
919 tdma->nr_channels);
924 dma_async_device_unregister(&tdma->dma_dev);
931 irq_dispose_mapping(tdma->channels[i].irq);
938 struct tegra_adma *tdma = platform_get_drvdata(pdev);
942 dma_async_device_unregister(&tdma->dma_dev);
944 for (i = 0; i < tdma->nr_channels; ++i)
945 irq_dispose_mapping(tdma->channels[i].irq);