Lines Matching refs:DMA_IRQ_EN
28 #define DMA_IRQ_EN(x) ((x) * 0x04)
41 /* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */
234 DMA_IRQ_EN(0), readl(sdev->base + DMA_IRQ_EN(0)),
235 DMA_IRQ_EN(1), readl(sdev->base + DMA_IRQ_EN(1)),
455 irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg));
459 writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg));
1029 writel(0, sdev->base + DMA_IRQ_EN(0));
1030 writel(0, sdev->base + DMA_IRQ_EN(1));