Lines Matching refs:src
30 u32 l1 = 0; /* src */
32 /* src is mem? -> increase address pos */
42 /* src is hw? -> master port 1 */
69 u32 src = 0;
75 src |= BIT(D40_SREG_CFG_MST_POS);
76 src |= D40_TYPE_TO_EVENT(cfg->dev_type);
79 src |= BIT(D40_SREG_CFG_PHY_TM_POS);
81 src |= 3 << D40_SREG_CFG_PHY_TM_POS;
98 src |= BIT(D40_SREG_CFG_EIM_POS);
103 src |= BIT(D40_SREG_CFG_PHY_PEN_POS);
104 src |= cfg->src_info.psize << D40_SREG_CFG_PSIZE_POS;
112 src |= d40_width_to_bits(cfg->src_info.data_width)
119 src |= BIT(D40_SREG_CFG_PRI_POS);
124 src |= BIT(D40_SREG_CFG_LBE_POS);
128 *src_cfg = src;
390 u32 lcsp13, /* src or dst*/
421 u32 lcsp13, /* src or dst*/