Lines Matching defs:dst
29 u32 l3 = 0; /* dst */
37 /* dst is mem? -> increase address pos */
47 /* dst is hw? -> master port 1 */
70 u32 dst = 0;
86 dst |= BIT(D40_SREG_CFG_MST_POS);
87 dst |= D40_TYPE_TO_EVENT(cfg->dev_type);
90 dst |= BIT(D40_SREG_CFG_PHY_TM_POS);
92 dst |= 3 << D40_SREG_CFG_PHY_TM_POS;
95 dst |= BIT(D40_SREG_CFG_TIM_POS);
99 dst |= BIT(D40_SREG_CFG_EIM_POS);
107 dst |= BIT(D40_SREG_CFG_PHY_PEN_POS);
108 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS;
114 dst |= d40_width_to_bits(cfg->dst_info.data_width)
120 dst |= BIT(D40_SREG_CFG_PRI_POS);
126 dst |= BIT(D40_SREG_CFG_LBE_POS);
129 *dst_cfg = dst;
287 dma_addr_t dst = target ?: sg_addr;
297 lli = d40_phy_buf_to_lli(lli, dst, len, l_phys, lli_phys,
390 u32 lcsp13, /* src or dst*/
421 u32 lcsp13, /* src or dst*/