Lines Matching refs:src
231 * @src: Interrupt mask register.
238 u32 src;
328 * enough, IE bigger than the most common case, 1 dst and 1 src. NULL if
339 /* Space for dst and src, plus an extra for padding */
346 * @lli_phy: LLI settings for physical channel. Both src and dst=
408 * @allocated_src: Bit mapped to show which src event line's are mapped to
410 * @allocated_dst: Same as for src but is dst.
449 * @src_def_cfg: Default cfg register setting for src.
452 * @lcpa: Pointer to dst and src lcpa settings.
661 d40d->lli_log.src = PTR_ALIGN(base, align);
662 d40d->lli_log.dst = d40d->lli_log.src + lli_len;
666 d40d->lli_phy.src = PTR_ALIGN(base, align);
667 d40d->lli_phy.dst = d40d->lli_phy.src + lli_len;
670 d40d->lli_phy.src,
695 d40d->lli_log.src = NULL;
697 d40d->lli_phy.src = NULL;
711 * Allocate both src and dst at the same time, therefore the half
809 struct d40_phy_lli *lli_src = desc->lli_phy.src;
878 &lli->src[lli_current],
906 &lli->src[lli_current],
916 &lli->src[lli_current],
1208 * The hardware sometimes doesn't register the enable when src and dst
1656 regs[i] = readl(base->virtbase + il[i].src);
1735 * src (burst x width) == dst (burst x width)
1738 chan_err(d40c, "src (burst x width) != dst (burst x width)\n");
2122 desc->lli_log.src,
2153 desc->lli_phy.src,
2154 virt_to_phys(desc->lli_phy.src),
2293 static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src)
2313 if (!src && chan_is_logical(d40c))
2319 if (!src)
2477 dma_addr_t src,
2488 sg_dma_address(&src_sg) = src;
2722 "src/dst width/maxburst mismatch: %d*%d != %d*%d\n",