Lines Matching refs:dma_cfg
445 * @dma_cfg: The client configuration of this dma channel.
447 * @configured: whether the dma_cfg configuration is valid
472 struct stedma40_chan_cfg dma_cfg;
858 chan->dma_cfg.dir == DMA_DEV_TO_MEM))
1241 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
1244 if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
1245 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
1249 if (d40c->dma_cfg.dir != DMA_DEV_TO_MEM)
1343 return phy_map[d40c->dma_cfg.mode_opt];
1345 return log_map[d40c->dma_cfg.mode_opt];
1397 return num_elt * d40c->dma_cfg.dst_info.data_width;
1834 int dev_type = d40c->dma_cfg.dev_type;
1843 bool is_log = d40c->dma_cfg.mode == STEDMA40_MODE_LOGICAL;
1848 if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
1851 } else if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
1852 d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
1863 if (d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
1865 if (d40c->dma_cfg.use_fixed_channel) {
1866 i = d40c->dma_cfg.phy_channel;
1904 if (d40c->dma_cfg.use_fixed_channel) {
1905 i = d40c->dma_cfg.phy_channel;
1964 d40c->dma_cfg = dma40_memcpy_conf_log;
1965 d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];
1967 d40_log_cfg(&d40c->dma_cfg,
1972 d40c->dma_cfg = dma40_memcpy_conf_phy;
1993 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
2011 if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
2012 d40c->dma_cfg.dir == DMA_MEM_TO_MEM)
2014 else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
2056 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
2074 if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
2075 d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
2077 } else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
2115 struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
2143 struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
2182 cfg = &chan->dma_cfg;
2282 d40c->dma_cfg = *info;
2295 bool realtime = d40c->dma_cfg.realtime;
2296 bool highprio = d40c->dma_cfg.high_priority;
2331 if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
2332 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
2333 __d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, true);
2335 if ((d40c->dma_cfg.dir == DMA_MEM_TO_DEV) ||
2336 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
2337 __d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, false);
2421 if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
2423 d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;
2426 d40c->dma_cfg.dev_type *
2437 d40c->dma_cfg.use_fixed_channel ? ", fixed" : "");
2661 struct stedma40_chan_cfg *cfg = &d40c->dma_cfg;