Lines Matching defs:val
277 * @val: The value that belongs to the register in reg.
281 unsigned int val;
286 { .reg = D40_DREG_GCC, .val = D40_DREG_GCC_ENABLE_ALL},
289 { .reg = D40_DREG_LCMIS0, .val = 0xFFFFFFFF},
290 { .reg = D40_DREG_LCMIS1, .val = 0xFFFFFFFF},
291 { .reg = D40_DREG_LCMIS2, .val = 0xFFFFFFFF},
292 { .reg = D40_DREG_LCMIS3, .val = 0xFFFFFFFF},
293 { .reg = D40_DREG_LCICR0, .val = 0xFFFFFFFF},
294 { .reg = D40_DREG_LCICR1, .val = 0xFFFFFFFF},
295 { .reg = D40_DREG_LCICR2, .val = 0xFFFFFFFF},
296 { .reg = D40_DREG_LCICR3, .val = 0xFFFFFFFF},
297 { .reg = D40_DREG_LCTIS0, .val = 0xFFFFFFFF},
298 { .reg = D40_DREG_LCTIS1, .val = 0xFFFFFFFF},
299 { .reg = D40_DREG_LCTIS2, .val = 0xFFFFFFFF},
300 { .reg = D40_DREG_LCTIS3, .val = 0xFFFFFFFF}
304 { .reg = D40_DREG_GCC, .val = D40_DREG_GCC_ENABLE_ALL},
307 { .reg = D40_DREG_CLCMIS1, .val = 0xFFFFFFFF},
308 { .reg = D40_DREG_CLCMIS2, .val = 0xFFFFFFFF},
309 { .reg = D40_DREG_CLCMIS3, .val = 0xFFFFFFFF},
310 { .reg = D40_DREG_CLCMIS4, .val = 0xFFFFFFFF},
311 { .reg = D40_DREG_CLCMIS5, .val = 0xFFFFFFFF},
312 { .reg = D40_DREG_CLCICR1, .val = 0xFFFFFFFF},
313 { .reg = D40_DREG_CLCICR2, .val = 0xFFFFFFFF},
314 { .reg = D40_DREG_CLCICR3, .val = 0xFFFFFFFF},
315 { .reg = D40_DREG_CLCICR4, .val = 0xFFFFFFFF},
316 { .reg = D40_DREG_CLCICR5, .val = 0xFFFFFFFF},
317 { .reg = D40_DREG_CLCTIS1, .val = 0xFFFFFFFF},
318 { .reg = D40_DREG_CLCTIS2, .val = 0xFFFFFFFF},
319 { .reg = D40_DREG_CLCTIS3, .val = 0xFFFFFFFF},
320 { .reg = D40_DREG_CLCTIS4, .val = 0xFFFFFFFF},
321 { .reg = D40_DREG_CLCTIS5, .val = 0xFFFFFFFF}
1257 u32 val;
1259 val = readl(chanbase + D40_CHAN_REG_SSLNK);
1260 val |= readl(chanbase + D40_CHAN_REG_SDLNK);
1262 return val;
1392 u32 val = readl(chan_base(d40c) + D40_CHAN_REG_SDELT);
1393 num_elt = (val & D40_SREG_ELEM_PHY_ECNT_MASK)
3024 u32 val[2];
3028 val[0] = readl(base->virtbase + D40_DREG_PRSME);
3029 val[1] = readl(base->virtbase + D40_DREG_PRSMO);
3034 if (((val[i % 2] >> odd_even_bit) & 3) == 1) {
3079 val[0] = readl(base->virtbase + D40_DREG_PRTYP);
3084 (val[0] & 0x3) != 1)
3087 __func__, i, val[0] & 0x3);
3089 val[0] = val[0] >> 2;
3330 writel(dma_init_reg[i].val,
3514 u32 val;
3557 val = readl(base->virtbase + D40_DREG_LCPA);
3558 if (res->start != val && val != 0) {
3561 __func__, val, &res->start);