Lines Matching defs:ret
706 int ret = -EINVAL;
720 ret = i;
727 return ret;
735 int ret = -EINVAL;
749 ret = 0;
757 return ret;
1026 int ret;
1029 ret = d40_size_2_dmalen(sg_dma_len(sg),
1031 if (ret < 0)
1032 return ret;
1033 len += ret;
1044 int ret = 0;
1049 ret = __d40_execute_command_phy(d40c, D40_DMA_SUSPEND_REQ);
1050 if (ret)
1051 return ret;
1099 ret = -EBUSY;
1105 return ret;
1269 int ret = 0;
1295 ret = __d40_execute_command_phy(d40c, command);
1302 ret = __d40_execute_command_phy(d40c, command);
1311 return ret;
2118 int ret;
2120 ret = d40_log_sg_to_lli(sg_src, sg_len,
2127 ret = d40_log_sg_to_lli(sg_dst, sg_len,
2134 return ret < 0 ? ret : 0;
2147 int ret;
2152 ret = d40_phy_sg_to_lli(sg_src, sg_len, src_dev_addr,
2158 ret = d40_phy_sg_to_lli(sg_dst, sg_len, dst_dev_addr,
2167 return ret < 0 ? ret : 0;
2176 int ret;
2190 ret = d40_pool_lli_alloc(chan, desc, desc->lli_len);
2191 if (ret < 0) {
2218 int ret;
2244 ret = d40_prep_sg_log(chan, desc, sg_src, sg_dst,
2247 ret = d40_prep_sg_phy(chan, desc, sg_src, sg_dst,
2250 if (ret) {
2252 chan_is_logical(chan) ? "log" : "phy", ret);
2543 enum dma_status ret;
2550 ret = dma_cookie_status(chan, cookie, txstate);
2551 if (ret != DMA_COMPLETE && txstate)
2555 ret = DMA_PAUSED;
2557 return ret;
2585 int ret;
2595 ret = d40_channel_execute_command(d40c, D40_DMA_STOP);
2596 if (ret)
2665 int ret;
2750 ret = dma40_config_to_halfchannel(d40c, &cfg->src_info,
2752 if (ret)
2753 return ret;
2755 ret = dma40_config_to_halfchannel(d40c, &cfg->dst_info,
2757 if (ret)
2758 return ret;
2909 int ret;
2911 ret = pm_runtime_force_suspend(dev);
2912 if (ret)
2913 return ret;
2916 ret = regulator_disable(base->lcpa_regulator);
2917 return ret;
2923 int ret = 0;
2926 ret = regulator_enable(base->lcpa_regulator);
2927 if (ret)
2928 return ret;
3377 int ret;
3400 ret = -ENOMEM;
3430 ret = -ENOMEM;
3443 ret = -ENOMEM;
3449 ret = 0;
3452 return ret;
3510 int ret = -ENOENT;
3519 ret = -ENOMEM;
3542 ret = -ENOENT;
3551 ret = -EBUSY;
3567 ret = -ENOMEM;
3576 ret = -ENOENT;
3584 ret = -ENOMEM;
3591 ret = d40_lcla_allocate(base);
3592 if (ret) {
3602 ret = base->irq;
3606 ret = request_irq(base->irq, d40_handle_interrupt, 0, D40_NAME, base);
3607 if (ret) {
3617 ret = PTR_ERR(base->lcpa_regulator);
3622 ret = regulator_enable(base->lcpa_regulator);
3623 if (ret) {
3641 ret = d40_dmaengine_init(base, num_reserved_chans);
3642 if (ret)
3645 ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
3646 if (ret) {
3654 ret = of_dma_controller_register(np, d40_xlate, NULL);
3655 if (ret)
3710 return ret;