Lines Matching defs:channels
193 * @n_channels: number of available channels
194 * @channels: array of DMAC channels
195 * @channels_mask: bitfield of which DMA channels are managed by this driver
204 struct rcar_dmac_chan *channels;
214 * @chan_offset_base: DMAC channels base offset
215 * @chan_offset_stride: DMAC channels offset stride
449 /* Clear all channels and enable the DMAC globally. */
822 /* Stop all channels. */
824 struct rcar_dmac_chan *chan = &dmac->channels[i];
1667 * channels from all controllers is just pointless.
1685 /* Only slave DMA channels can be allocated via DT */
1771 * channels list.
1776 list_add_tail(&chan->device_node, &dmac->engine.channels);
1798 ret = of_property_read_u32(np, "dma-channels", &dmac->n_channels);
1800 dev_err(dev, "unable to read dma-channels property\n");
1807 dev_err(dev, "invalid number of channels %u\n",
1814 * the driver assumes that it can use all channels.
1870 dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
1871 sizeof(*dmac->channels), GFP_KERNEL);
1872 if (!dmac->channels)
1922 INIT_LIST_HEAD(&engine->channels);
1928 ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i], data, i);