Lines Matching refs:od
265 static void dma_update(struct owl_dma *od, u32 reg, u32 val, bool state)
269 regval = readl(od->base + reg);
276 writel(val, od->base + reg);
279 static void dma_writel(struct owl_dma *od, u32 reg, u32 data)
281 writel(data, od->base + reg);
284 static u32 dma_readl(struct owl_dma *od, u32 reg)
286 return readl(od->base + reg);
341 static void owl_dma_free_lli(struct owl_dma *od,
345 dma_pool_free(od->lli_pool, lli, lli->phys);
348 static struct owl_dma_lli *owl_dma_alloc_lli(struct owl_dma *od)
353 lli = dma_pool_alloc(od->lli_pool, GFP_NOWAIT, &phys);
387 struct owl_dma *od = to_owl_dma(vchan->vc.chan.device);
444 if (od->devid == S700_DMA) {
467 static struct owl_dma_pchan *owl_dma_get_pchan(struct owl_dma *od,
474 for (i = 0; i < od->nr_pchans; i++) {
475 pchan = &od->pchans[i];
477 spin_lock_irqsave(&od->lock, flags);
480 spin_unlock_irqrestore(&od->lock, flags);
484 spin_unlock_irqrestore(&od->lock, flags);
490 static int owl_dma_pchan_busy(struct owl_dma *od, struct owl_dma_pchan *pchan)
494 val = dma_readl(od, OWL_DMA_IDLE_STAT);
499 static void owl_dma_terminate_pchan(struct owl_dma *od,
508 spin_lock_irqsave(&od->lock, flags);
509 dma_update(od, OWL_DMA_IRQ_EN0, (1 << pchan->id), false);
511 irq_pd = dma_readl(od, OWL_DMA_IRQ_PD0);
513 dev_warn(od->dma.dev,
516 dma_writel(od, OWL_DMA_IRQ_PD0, (1 << pchan->id));
521 spin_unlock_irqrestore(&od->lock, flags);
536 struct owl_dma *od = to_owl_dma(vchan->vc.chan.device);
549 while (owl_dma_pchan_busy(od, pchan))
569 spin_lock_irqsave(&od->lock, flags);
571 dma_update(od, OWL_DMA_IRQ_EN0, (1 << pchan->id), true);
573 spin_unlock_irqrestore(&od->lock, flags);
583 static void owl_dma_phy_free(struct owl_dma *od, struct owl_dma_vchan *vchan)
586 owl_dma_terminate_pchan(od, vchan->pchan);
593 struct owl_dma *od = dev_id;
600 spin_lock(&od->lock);
602 pending = dma_readl(od, OWL_DMA_IRQ_PD0);
605 for_each_set_bit(i, &pending, od->nr_pchans) {
606 pchan = &od->pchans[i];
611 dma_writel(od, OWL_DMA_IRQ_PD0, pending);
614 for (i = 0; i < od->nr_pchans; i++) {
615 pchan = &od->pchans[i];
620 dma_readl(od, OWL_DMA_IRQ_PD0);
622 global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0);
625 dev_dbg(od->dma.dev,
637 spin_unlock(&od->lock);
639 for_each_set_bit(i, &pending, od->nr_pchans) {
642 pchan = &od->pchans[i];
646 dev_warn(od->dma.dev, "no vchan attached on pchan %d\n",
666 owl_dma_phy_free(od, vchan);
675 static void owl_dma_free_txd(struct owl_dma *od, struct owl_dma_txd *txd)
683 owl_dma_free_lli(od, lli);
690 struct owl_dma *od = to_owl_dma(vd->tx.chan->device);
693 owl_dma_free_txd(od, txd);
698 struct owl_dma *od = to_owl_dma(chan->device);
706 owl_dma_phy_free(od, vchan);
839 struct owl_dma *od = to_owl_dma(vchan->vc.chan.device);
842 pchan = owl_dma_get_pchan(od, vchan);
846 dev_dbg(od->dma.dev, "allocated pchan %d\n", pchan->id);
870 struct owl_dma *od = to_owl_dma(chan->device);
888 lli = owl_dma_alloc_lli(od);
910 owl_dma_free_txd(od, txd);
921 struct owl_dma *od = to_owl_dma(chan->device);
942 dev_err(od->dma.dev,
947 lli = owl_dma_alloc_lli(od);
974 owl_dma_free_txd(od, txd);
986 struct owl_dma *od = to_owl_dma(chan->device);
1003 lli = owl_dma_alloc_lli(od);
1036 owl_dma_free_txd(od, txd);
1049 static inline void owl_dma_free(struct owl_dma *od)
1055 next, &od->dma.channels, vc.chan.device_node) {
1064 struct owl_dma *od = ofdma->of_dma_data;
1069 if (drq > od->nr_vchans)
1072 chan = dma_get_any_slave_channel(&od->dma);
1092 struct owl_dma *od;
1095 od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL);
1096 if (!od)
1099 od->base = devm_platform_ioremap_resource(pdev, 0);
1100 if (IS_ERR(od->base))
1101 return PTR_ERR(od->base);
1118 od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev);
1120 od->nr_pchans = nr_channels;
1121 od->nr_vchans = nr_requests;
1125 platform_set_drvdata(pdev, od);
1126 spin_lock_init(&od->lock);
1128 dma_cap_set(DMA_MEMCPY, od->dma.cap_mask);
1129 dma_cap_set(DMA_SLAVE, od->dma.cap_mask);
1130 dma_cap_set(DMA_CYCLIC, od->dma.cap_mask);
1132 od->dma.dev = &pdev->dev;
1133 od->dma.device_free_chan_resources = owl_dma_free_chan_resources;
1134 od->dma.device_tx_status = owl_dma_tx_status;
1135 od->dma.device_issue_pending = owl_dma_issue_pending;
1136 od->dma.device_prep_dma_memcpy = owl_dma_prep_memcpy;
1137 od->dma.device_prep_slave_sg = owl_dma_prep_slave_sg;
1138 od->dma.device_prep_dma_cyclic = owl_prep_dma_cyclic;
1139 od->dma.device_config = owl_dma_config;
1140 od->dma.device_pause = owl_dma_pause;
1141 od->dma.device_resume = owl_dma_resume;
1142 od->dma.device_terminate_all = owl_dma_terminate_all;
1143 od->dma.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
1144 od->dma.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
1145 od->dma.directions = BIT(DMA_MEM_TO_MEM);
1146 od->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
1148 INIT_LIST_HEAD(&od->dma.channels);
1150 od->clk = devm_clk_get(&pdev->dev, NULL);
1151 if (IS_ERR(od->clk)) {
1153 return PTR_ERR(od->clk);
1161 od->irq = platform_get_irq(pdev, 0);
1162 ret = devm_request_irq(&pdev->dev, od->irq, owl_dma_interrupt, 0,
1163 dev_name(&pdev->dev), od);
1170 od->pchans = devm_kcalloc(&pdev->dev, od->nr_pchans,
1172 if (!od->pchans)
1175 for (i = 0; i < od->nr_pchans; i++) {
1176 struct owl_dma_pchan *pchan = &od->pchans[i];
1179 pchan->base = od->base + OWL_DMA_CHAN_BASE(i);
1183 od->vchans = devm_kcalloc(&pdev->dev, od->nr_vchans,
1185 if (!od->vchans)
1188 for (i = 0; i < od->nr_vchans; i++) {
1189 struct owl_dma_vchan *vchan = &od->vchans[i];
1192 vchan_init(&vchan->vc, &od->dma);
1196 od->lli_pool = dma_pool_create(dev_name(od->dma.dev), od->dma.dev,
1200 if (!od->lli_pool) {
1205 clk_prepare_enable(od->clk);
1207 ret = dma_async_device_register(&od->dma);
1215 owl_dma_of_xlate, od);
1224 dma_async_device_unregister(&od->dma);
1226 clk_disable_unprepare(od->clk);
1227 dma_pool_destroy(od->lli_pool);
1234 struct owl_dma *od = platform_get_drvdata(pdev);
1237 dma_async_device_unregister(&od->dma);
1240 dma_writel(od, OWL_DMA_IRQ_EN0, 0x0);
1243 devm_free_irq(od->dma.dev, od->irq, od);
1245 owl_dma_free(od);
1247 clk_disable_unprepare(od->clk);
1248 dma_pool_destroy(od->lli_pool);