Lines Matching defs:hsdma
264 static struct device *hsdma2dev(struct mtk_hsdma_device *hsdma)
266 return hsdma->ddev.dev;
269 static u32 mtk_dma_read(struct mtk_hsdma_device *hsdma, u32 reg)
271 return readl(hsdma->base + reg);
274 static void mtk_dma_write(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
276 writel(val, hsdma->base + reg);
279 static void mtk_dma_rmw(struct mtk_hsdma_device *hsdma, u32 reg,
284 val = mtk_dma_read(hsdma, reg);
287 mtk_dma_write(hsdma, reg, val);
290 static void mtk_dma_set(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
292 mtk_dma_rmw(hsdma, reg, 0, val);
295 static void mtk_dma_clr(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
297 mtk_dma_rmw(hsdma, reg, val, 0);
305 static int mtk_hsdma_busy_wait(struct mtk_hsdma_device *hsdma)
309 return readl_poll_timeout(hsdma->base + MTK_HSDMA_GLO, status,
315 static int mtk_hsdma_alloc_pchan(struct mtk_hsdma_device *hsdma,
328 ring->txd = dma_alloc_coherent(hsdma2dev(hsdma), pc->sz_ring,
347 mtk_dma_clr(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
348 err = mtk_hsdma_busy_wait(hsdma);
353 mtk_dma_set(hsdma, MTK_HSDMA_RESET,
355 mtk_dma_clr(hsdma, MTK_HSDMA_RESET,
359 mtk_dma_write(hsdma, MTK_HSDMA_TX_BASE, ring->tphys);
360 mtk_dma_write(hsdma, MTK_HSDMA_TX_CNT, MTK_DMA_SIZE);
361 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, ring->cur_tptr);
362 mtk_dma_write(hsdma, MTK_HSDMA_TX_DMA, 0);
363 mtk_dma_write(hsdma, MTK_HSDMA_RX_BASE, ring->rphys);
364 mtk_dma_write(hsdma, MTK_HSDMA_RX_CNT, MTK_DMA_SIZE);
365 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, ring->cur_rptr);
366 mtk_dma_write(hsdma, MTK_HSDMA_RX_DMA, 0);
369 mtk_dma_set(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
372 mtk_dma_write(hsdma, MTK_HSDMA_DLYINT, MTK_HSDMA_DLYINT_DEFAULT);
375 mtk_dma_set(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
383 dma_free_coherent(hsdma2dev(hsdma),
388 static void mtk_hsdma_free_pchan(struct mtk_hsdma_device *hsdma,
394 mtk_dma_clr(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
395 mtk_hsdma_busy_wait(hsdma);
398 mtk_dma_clr(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
399 mtk_dma_write(hsdma, MTK_HSDMA_TX_BASE, 0);
400 mtk_dma_write(hsdma, MTK_HSDMA_TX_CNT, 0);
401 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, 0);
402 mtk_dma_write(hsdma, MTK_HSDMA_RX_BASE, 0);
403 mtk_dma_write(hsdma, MTK_HSDMA_RX_CNT, 0);
404 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, MTK_DMA_SIZE - 1);
408 dma_free_coherent(hsdma2dev(hsdma),
412 static int mtk_hsdma_issue_pending_vdesc(struct mtk_hsdma_device *hsdma,
422 spin_lock_irqsave(&hsdma->lock, flags);
432 spin_unlock_irqrestore(&hsdma->lock, flags);
453 hsdma->soc->ls0 | MTK_HSDMA_DESC_PLEN(tlen));
488 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, ring->cur_tptr);
490 spin_unlock_irqrestore(&hsdma->lock, flags);
495 static void mtk_hsdma_issue_vchan_pending(struct mtk_hsdma_device *hsdma,
509 err = mtk_hsdma_issue_pending_vdesc(hsdma, hsdma->pc, hvd);
533 static void mtk_hsdma_free_rooms_in_ring(struct mtk_hsdma_device *hsdma)
546 status = mtk_dma_read(hsdma, MTK_HSDMA_INT_STATUS);
550 pc = hsdma->pc;
569 if (!(desc2 & hsdma->soc->ddone))
574 dev_err(hsdma2dev(hsdma), "cb->vd cannot be null\n");
622 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, pc->ring.cur_rptr);
630 mtk_dma_write(hsdma, MTK_HSDMA_INT_STATUS, status);
633 for (i = 0; i < hsdma->dma_requests; i++) {
634 hvc = &hsdma->vc[i];
636 mtk_hsdma_issue_vchan_pending(hsdma, hvc);
642 mtk_dma_set(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
647 struct mtk_hsdma_device *hsdma = devid;
653 mtk_dma_clr(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
655 mtk_hsdma_free_rooms_in_ring(hsdma);
708 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
715 mtk_hsdma_issue_vchan_pending(hsdma, hvc);
810 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
818 if (!refcount_read(&hsdma->pc_refcnt)) {
819 err = mtk_hsdma_alloc_pchan(hsdma, hsdma->pc);
826 refcount_set(&hsdma->pc_refcnt, 1);
828 refcount_inc(&hsdma->pc_refcnt);
836 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
842 if (!refcount_dec_and_test(&hsdma->pc_refcnt))
845 mtk_hsdma_free_pchan(hsdma, hsdma->pc);
848 static int mtk_hsdma_hw_init(struct mtk_hsdma_device *hsdma)
852 pm_runtime_enable(hsdma2dev(hsdma));
853 pm_runtime_get_sync(hsdma2dev(hsdma));
855 err = clk_prepare_enable(hsdma->clk);
859 mtk_dma_write(hsdma, MTK_HSDMA_INT_ENABLE, 0);
860 mtk_dma_write(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DEFAULT);
865 static int mtk_hsdma_hw_deinit(struct mtk_hsdma_device *hsdma)
867 mtk_dma_write(hsdma, MTK_HSDMA_GLO, 0);
869 clk_disable_unprepare(hsdma->clk);
871 pm_runtime_put_sync(hsdma2dev(hsdma));
872 pm_runtime_disable(hsdma2dev(hsdma));
888 { .compatible = "mediatek,mt7623-hsdma", .data = &mt7623_soc},
889 { .compatible = "mediatek,mt7622-hsdma", .data = &mt7622_soc},
896 struct mtk_hsdma_device *hsdma;
902 hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL);
903 if (!hsdma)
906 dd = &hsdma->ddev;
909 hsdma->base = devm_ioremap_resource(&pdev->dev, res);
910 if (IS_ERR(hsdma->base))
911 return PTR_ERR(hsdma->base);
913 hsdma->soc = of_device_get_match_data(&pdev->dev);
914 if (!hsdma->soc) {
919 hsdma->clk = devm_clk_get(&pdev->dev, "hsdma");
920 if (IS_ERR(hsdma->clk)) {
923 return PTR_ERR(hsdma->clk);
932 hsdma->irq = res->start;
934 refcount_set(&hsdma->pc_refcnt, 0);
935 spin_lock_init(&hsdma->lock);
953 hsdma->dma_requests = MTK_HSDMA_NR_VCHANS;
956 &hsdma->dma_requests)) {
962 hsdma->pc = devm_kcalloc(&pdev->dev, MTK_HSDMA_NR_MAX_PCHANS,
963 sizeof(*hsdma->pc), GFP_KERNEL);
964 if (!hsdma->pc)
967 hsdma->vc = devm_kcalloc(&pdev->dev, hsdma->dma_requests,
968 sizeof(*hsdma->vc), GFP_KERNEL);
969 if (!hsdma->vc)
972 for (i = 0; i < hsdma->dma_requests; i++) {
973 vc = &hsdma->vc[i];
985 of_dma_xlate_by_chan_id, hsdma);
992 mtk_hsdma_hw_init(hsdma);
994 err = devm_request_irq(&pdev->dev, hsdma->irq,
996 dev_name(&pdev->dev), hsdma);
1003 platform_set_drvdata(pdev, hsdma);
1010 mtk_hsdma_hw_deinit(hsdma);
1020 struct mtk_hsdma_device *hsdma = platform_get_drvdata(pdev);
1025 for (i = 0; i < hsdma->dma_requests; i++) {
1026 vc = &hsdma->vc[i];
1033 mtk_dma_write(hsdma, MTK_HSDMA_INT_ENABLE, 0);
1036 synchronize_irq(hsdma->irq);
1039 mtk_hsdma_hw_deinit(hsdma);
1041 dma_async_device_unregister(&hsdma->ddev);