Lines Matching defs:dma
14 #include <linux/dma-mapping.h>
20 #include "dma.h"
298 * @ioat_dma: dma device to be tested
305 struct dma_device *dma = &ioat_dma->dma_dev;
330 dma_chan = container_of(dma->channels.next, struct dma_chan,
332 if (dma->device_alloc_chan_resources(dma_chan) < 1) {
370 dma->device_issue_pending(dma_chan);
375 dma->device_tx_status(dma_chan, cookie, NULL)
392 dma->device_free_chan_resources(dma_chan);
401 * @ioat_dma: ioat dma device
496 struct dma_device *dma = &ioat_dma->dma_dev;
512 dma_cap_set(DMA_MEMCPY, dma->cap_mask);
513 dma->dev = &pdev->dev;
515 if (!dma->chancnt) {
552 struct dma_device *dma = &ioat_dma->dma_dev;
558 dma_async_device_unregister(dma);
563 * @ioat_dma: the ioat dma device to be enumerated
569 struct dma_device *dma = &ioat_dma->dma_dev;
573 INIT_LIST_HEAD(&dma->channels);
574 dma->chancnt = readb(ioat_dma->reg_base + IOAT_CHANCNT_OFFSET);
575 dma->chancnt &= 0x1f; /* bits [4:0] valid */
576 if (dma->chancnt > ARRAY_SIZE(ioat_dma->idx)) {
578 dma->chancnt, ARRAY_SIZE(ioat_dma->idx));
579 dma->chancnt = ARRAY_SIZE(ioat_dma->idx);
587 for (i = 0; i < dma->chancnt; i++) {
600 dma->chancnt = i;
769 struct dma_device *dma = &ioat_dma->dma_dev;
774 ioat_chan->dma_chan.device = dma;
776 list_add_tail(&ioat_chan->dma_chan.device_node, &dma->channels);
801 struct dma_device *dma = &ioat_dma->dma_dev;
806 if (!dma_has_cap(DMA_XOR, dma->cap_mask))
841 dma_chan = container_of(dma->channels.next, struct dma_chan,
843 if (dma->device_alloc_chan_resources(dma_chan) < 1) {
865 tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs,
885 dma->device_issue_pending(dma_chan);
890 dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
934 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
953 dma->device_issue_pending(dma_chan);
958 dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
987 tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
1006 dma->device_issue_pending(dma_chan);
1011 dma->device_tx_status(dma_chan, cookie, NULL) != DMA_COMPLETE) {
1039 dma->device_free_chan_resources(dma_chan);
1063 struct dma_device *dma;
1068 dma = &ioat_dma->dma_dev;
1075 list_for_each_entry(c, &dma->channels, device_node) {
1091 struct dma_device *dma;
1097 dma = &ioat_dma->dma_dev;
1098 dma->device_prep_dma_memcpy = ioat_dma_prep_memcpy_lock;
1099 dma->device_issue_pending = ioat_issue_pending;
1100 dma->device_alloc_chan_resources = ioat_alloc_chan_resources;
1101 dma->device_free_chan_resources = ioat_free_chan_resources;
1103 dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
1104 dma->device_prep_dma_interrupt = ioat_prep_interrupt_lock;
1117 dma->max_xor = 8;
1119 dma_cap_set(DMA_XOR, dma->cap_mask);
1120 dma->device_prep_dma_xor = ioat_prep_xor;
1122 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
1123 dma->device_prep_dma_xor_val = ioat_prep_xor_val;
1128 dma->device_prep_dma_pq = ioat_prep_pq;
1129 dma->device_prep_dma_pq_val = ioat_prep_pq_val;
1130 dma_cap_set(DMA_PQ, dma->cap_mask);
1131 dma_cap_set(DMA_PQ_VAL, dma->cap_mask);
1134 dma_set_maxpq(dma, 16, 0);
1136 dma_set_maxpq(dma, 8, 0);
1139 dma->device_prep_dma_xor = ioat_prep_pqxor;
1140 dma->device_prep_dma_xor_val = ioat_prep_pqxor_val;
1141 dma_cap_set(DMA_XOR, dma->cap_mask);
1142 dma_cap_set(DMA_XOR_VAL, dma->cap_mask);
1145 dma->max_xor = 16;
1147 dma->max_xor = 8;
1151 dma->device_tx_status = ioat_tx_status;
1172 dma_cap_set(DMA_PRIVATE, dma->cap_mask);
1178 list_for_each_entry(c, &dma->channels, device_node) {
1415 dev_err(&pdev->dev, "Removing dma and dca services\n");