Lines Matching defs:imx_dmav1_writel
256 static void imx_dmav1_writel(struct imxdma_engine *imxdma, unsigned val,
292 imx_dmav1_writel(imxdma, sg->dma_address,
295 imx_dmav1_writel(imxdma, sg->dma_address,
298 imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));
318 imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);
319 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) &
321 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |
331 imx_dmav1_writel(imxdma, tmp | CCR_RPT | CCR_ACRPT,
351 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) |
353 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) &
355 imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);
365 imx_dmav1_writel(imxdma, 0, DMA_CCR(channel));
390 imx_dmav1_writel(imxdma, disr & err_mask, DMA_DISR);
398 imx_dmav1_writel(imxdma, 1 << i, DMA_DBTOSR);
402 imx_dmav1_writel(imxdma, 1 << i, DMA_DRTOSR);
406 imx_dmav1_writel(imxdma, 1 << i, DMA_DSESR);
410 imx_dmav1_writel(imxdma, 1 << i, DMA_DBOSR);
461 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));
463 imx_dmav1_writel(imxdma, tmp & ~CCR_CEN,
468 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));
484 imx_dmav1_writel(imxdma, 0, DMA_CCR(chno));
501 imx_dmav1_writel(imxdma, disr, DMA_DISR);
544 imx_dmav1_writel(imxdma, d->x, DMA_XSRA);
545 imx_dmav1_writel(imxdma, d->y, DMA_YSRA);
546 imx_dmav1_writel(imxdma, d->w, DMA_WSRA);
550 imx_dmav1_writel(imxdma, d->x, DMA_XSRB);
551 imx_dmav1_writel(imxdma, d->y, DMA_YSRB);
552 imx_dmav1_writel(imxdma, d->w, DMA_WSRB);
560 imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));
561 imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));
562 imx_dmav1_writel(imxdma, d->config_mem | (d->config_port << 2),
565 imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
578 imx_dmav1_writel(imxdma, imxdmac->per_address,
580 imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
589 imx_dmav1_writel(imxdma, imxdmac->per_address,
591 imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
716 imx_dmav1_writel(imxdma, imxdmac->dma_request,
720 imx_dmav1_writel(imxdma, imxdmac->watermark_level *
1101 imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
1128 imx_dmav1_writel(imxdma, DCR_DEN, DMA_DCR);
1131 imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
1134 imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);