Lines Matching defs:idxd

17 #include <uapi/linux/idxd.h>
21 #include "idxd.h"
27 #define DRV_NAME "idxd"
43 const char *idxd_get_dev_name(struct idxd_device *idxd)
45 return idxd_name[idxd->type];
48 static int idxd_setup_interrupts(struct idxd_device *idxd)
50 struct pci_dev *pdev = idxd->pdev;
63 idxd->msix_entries = devm_kzalloc(dev, sizeof(struct msix_entry) *
65 if (!idxd->msix_entries) {
71 idxd->msix_entries[i].entry = i;
73 rc = pci_enable_msix_exact(pdev, idxd->msix_entries, msixcnt);
84 idxd->irq_entries = devm_kcalloc(dev, msixcnt,
87 if (!idxd->irq_entries) {
93 idxd->irq_entries[i].id = i;
94 idxd->irq_entries[i].idxd = idxd;
97 msix = &idxd->msix_entries[0];
98 irq_entry = &idxd->irq_entries[0];
100 idxd_misc_thread, 0, "idxd-misc",
107 dev_dbg(dev, "Allocated idxd-misc handler on msix vector %d\n",
111 idxd->num_wq_irqs = msixcnt - 1;
114 msix = &idxd->msix_entries[i];
115 irq_entry = &idxd->irq_entries[i];
117 init_llist_head(&idxd->irq_entries[i].pending_llist);
118 INIT_LIST_HEAD(&idxd->irq_entries[i].work_list);
122 "idxd-portal", irq_entry);
128 dev_dbg(dev, "Allocated idxd-msix %d for vector %d\n",
132 idxd_unmask_error_interrupts(idxd);
138 idxd_mask_error_interrupts(idxd);
144 static int idxd_setup_internals(struct idxd_device *idxd)
146 struct device *dev = &idxd->pdev->dev;
149 init_waitqueue_head(&idxd->cmd_waitq);
150 idxd->groups = devm_kcalloc(dev, idxd->max_groups,
152 if (!idxd->groups)
155 for (i = 0; i < idxd->max_groups; i++) {
156 idxd->groups[i].idxd = idxd;
157 idxd->groups[i].id = i;
158 idxd->groups[i].tc_a = -1;
159 idxd->groups[i].tc_b = -1;
162 idxd->wqs = devm_kcalloc(dev, idxd->max_wqs, sizeof(struct idxd_wq),
164 if (!idxd->wqs)
167 idxd->engines = devm_kcalloc(dev, idxd->max_engines,
169 if (!idxd->engines)
172 for (i = 0; i < idxd->max_wqs; i++) {
173 struct idxd_wq *wq = &idxd->wqs[i];
176 wq->idxd = idxd;
179 wq->max_xfer_bytes = idxd->max_xfer_bytes;
180 wq->max_batch_size = idxd->max_batch_size;
181 wq->wqcfg = devm_kzalloc(dev, idxd->wqcfg_size, GFP_KERNEL);
186 for (i = 0; i < idxd->max_engines; i++) {
187 idxd->engines[i].idxd = idxd;
188 idxd->engines[i].id = i;
191 idxd->wq = create_workqueue(dev_name(dev));
192 if (!idxd->wq)
198 static void idxd_read_table_offsets(struct idxd_device *idxd)
201 struct device *dev = &idxd->pdev->dev;
203 offsets.bits[0] = ioread64(idxd->reg_base + IDXD_TABLE_OFFSET);
204 offsets.bits[1] = ioread64(idxd->reg_base + IDXD_TABLE_OFFSET
206 idxd->grpcfg_offset = offsets.grpcfg * 0x100;
207 dev_dbg(dev, "IDXD Group Config Offset: %#x\n", idxd->grpcfg_offset);
208 idxd->wqcfg_offset = offsets.wqcfg * 0x100;
210 idxd->wqcfg_offset);
211 idxd->msix_perm_offset = offsets.msix_perm * 0x100;
213 idxd->msix_perm_offset);
214 idxd->perfmon_offset = offsets.perfmon * 0x100;
215 dev_dbg(dev, "IDXD Perfmon Offset: %#x\n", idxd->perfmon_offset);
218 static void idxd_read_caps(struct idxd_device *idxd)
220 struct device *dev = &idxd->pdev->dev;
224 idxd->hw.gen_cap.bits = ioread64(idxd->reg_base + IDXD_GENCAP_OFFSET);
225 dev_dbg(dev, "gen_cap: %#llx\n", idxd->hw.gen_cap.bits);
226 idxd->max_xfer_bytes = 1ULL << idxd->hw.gen_cap.max_xfer_shift;
227 dev_dbg(dev, "max xfer size: %llu bytes\n", idxd->max_xfer_bytes);
228 idxd->max_batch_size = 1U << idxd->hw.gen_cap.max_batch_shift;
229 dev_dbg(dev, "max batch size: %u\n", idxd->max_batch_size);
230 if (idxd->hw.gen_cap.config_en)
231 set_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags);
234 idxd->hw.group_cap.bits =
235 ioread64(idxd->reg_base + IDXD_GRPCAP_OFFSET);
236 dev_dbg(dev, "group_cap: %#llx\n", idxd->hw.group_cap.bits);
237 idxd->max_groups = idxd->hw.group_cap.num_groups;
238 dev_dbg(dev, "max groups: %u\n", idxd->max_groups);
239 idxd->max_tokens = idxd->hw.group_cap.total_tokens;
240 dev_dbg(dev, "max tokens: %u\n", idxd->max_tokens);
241 idxd->nr_tokens = idxd->max_tokens;
244 idxd->hw.engine_cap.bits =
245 ioread64(idxd->reg_base + IDXD_ENGCAP_OFFSET);
246 dev_dbg(dev, "engine_cap: %#llx\n", idxd->hw.engine_cap.bits);
247 idxd->max_engines = idxd->hw.engine_cap.num_engines;
248 dev_dbg(dev, "max engines: %u\n", idxd->max_engines);
251 idxd->hw.wq_cap.bits = ioread64(idxd->reg_base + IDXD_WQCAP_OFFSET);
252 dev_dbg(dev, "wq_cap: %#llx\n", idxd->hw.wq_cap.bits);
253 idxd->max_wq_size = idxd->hw.wq_cap.total_wq_size;
254 dev_dbg(dev, "total workqueue size: %u\n", idxd->max_wq_size);
255 idxd->max_wqs = idxd->hw.wq_cap.num_wqs;
256 dev_dbg(dev, "max workqueues: %u\n", idxd->max_wqs);
257 idxd->wqcfg_size = 1 << (idxd->hw.wq_cap.wqcfg_size + IDXD_WQCFG_MIN);
258 dev_dbg(dev, "wqcfg size: %u\n", idxd->wqcfg_size);
262 idxd->hw.opcap.bits[i] = ioread64(idxd->reg_base +
264 dev_dbg(dev, "opcap[%d]: %#llx\n", i, idxd->hw.opcap.bits[i]);
272 struct idxd_device *idxd;
274 idxd = devm_kzalloc(dev, sizeof(struct idxd_device), GFP_KERNEL);
275 if (!idxd)
278 idxd->pdev = pdev;
279 idxd->reg_base = iomap[IDXD_MMIO_BAR];
280 spin_lock_init(&idxd->dev_lock);
282 return idxd;
285 static int idxd_probe(struct idxd_device *idxd)
287 struct pci_dev *pdev = idxd->pdev;
292 rc = idxd_device_init_reset(idxd);
298 idxd_read_caps(idxd);
299 idxd_read_table_offsets(idxd);
301 rc = idxd_setup_internals(idxd);
305 rc = idxd_setup_interrupts(idxd);
312 idxd->id = idr_alloc(&idxd_idrs[idxd->type], idxd, 0, 0, GFP_KERNEL);
314 if (idxd->id < 0) {
319 idxd->major = idxd_cdev_get_major(idxd);
321 dev_dbg(dev, "IDXD device %d probed successfully\n", idxd->id);
325 idxd_mask_error_interrupts(idxd);
326 idxd_mask_msix_vectors(idxd);
335 struct idxd_device *idxd;
367 idxd = idxd_alloc(pdev, iomap);
368 if (!idxd)
371 idxd_set_type(idxd);
375 pci_set_drvdata(pdev, idxd);
377 idxd->hw.version = ioread32(idxd->reg_base + IDXD_VER_OFFSET);
378 rc = idxd_probe(idxd);
384 rc = idxd_setup_sysfs(idxd);
390 idxd->state = IDXD_DEV_CONF_READY;
393 idxd->hw.version);
426 struct idxd_device *idxd = pci_get_drvdata(pdev);
431 rc = idxd_device_disable(idxd);
436 idxd_mask_msix_vectors(idxd);
437 idxd_mask_error_interrupts(idxd);
440 irq_entry = &idxd->irq_entries[i];
441 synchronize_irq(idxd->msix_entries[i].vector);
448 destroy_workqueue(idxd->wq);
453 struct idxd_device *idxd = pci_get_drvdata(pdev);
456 idxd_cleanup_sysfs(idxd);
459 idr_remove(&idxd_idrs[idxd->type], idxd->id);
480 pr_warn("idxd driver failed to load without MOVDIR64B.\n");