Lines Matching refs:wq
62 static void free_hw_descs(struct idxd_wq *wq)
66 for (i = 0; i < wq->num_descs; i++)
67 kfree(wq->hw_descs[i]);
69 kfree(wq->hw_descs);
72 static int alloc_hw_descs(struct idxd_wq *wq, int num)
74 struct device *dev = &wq->idxd->pdev->dev;
78 wq->hw_descs = kcalloc_node(num, sizeof(struct dsa_hw_desc *),
80 if (!wq->hw_descs)
84 wq->hw_descs[i] = kzalloc_node(sizeof(*wq->hw_descs[i]),
86 if (!wq->hw_descs[i]) {
87 free_hw_descs(wq);
95 static void free_descs(struct idxd_wq *wq)
99 for (i = 0; i < wq->num_descs; i++)
100 kfree(wq->descs[i]);
102 kfree(wq->descs);
105 static int alloc_descs(struct idxd_wq *wq, int num)
107 struct device *dev = &wq->idxd->pdev->dev;
111 wq->descs = kcalloc_node(num, sizeof(struct idxd_desc *),
113 if (!wq->descs)
117 wq->descs[i] = kzalloc_node(sizeof(*wq->descs[i]),
119 if (!wq->descs[i]) {
120 free_descs(wq);
129 int idxd_wq_alloc_resources(struct idxd_wq *wq)
131 struct idxd_device *idxd = wq->idxd;
135 if (wq->type != IDXD_WQT_KERNEL)
138 wq->num_descs = wq->size;
139 num_descs = wq->size;
141 rc = alloc_hw_descs(wq, num_descs);
145 wq->compls_size = num_descs * sizeof(struct dsa_completion_record);
146 wq->compls = dma_alloc_coherent(dev, wq->compls_size,
147 &wq->compls_addr, GFP_KERNEL);
148 if (!wq->compls) {
153 rc = alloc_descs(wq, num_descs);
157 rc = sbitmap_queue_init_node(&wq->sbq, num_descs, -1, false, GFP_KERNEL,
163 struct idxd_desc *desc = wq->descs[i];
165 desc->hw = wq->hw_descs[i];
166 desc->completion = &wq->compls[i];
167 desc->compl_dma = wq->compls_addr +
170 desc->wq = wq;
177 free_descs(wq);
179 dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr);
181 free_hw_descs(wq);
185 void idxd_wq_free_resources(struct idxd_wq *wq)
187 struct device *dev = &wq->idxd->pdev->dev;
189 if (wq->type != IDXD_WQT_KERNEL)
192 free_hw_descs(wq);
193 free_descs(wq);
194 dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr);
195 sbitmap_queue_free(&wq->sbq);
198 int idxd_wq_enable(struct idxd_wq *wq)
200 struct idxd_device *idxd = wq->idxd;
204 if (wq->state == IDXD_WQ_ENABLED) {
205 dev_dbg(dev, "WQ %d already enabled\n", wq->id);
209 idxd_cmd_exec(idxd, IDXD_CMD_ENABLE_WQ, wq->id, &status);
217 wq->state = IDXD_WQ_ENABLED;
218 dev_dbg(dev, "WQ %d enabled\n", wq->id);
222 int idxd_wq_disable(struct idxd_wq *wq)
224 struct idxd_device *idxd = wq->idxd;
228 dev_dbg(dev, "Disabling WQ %d\n", wq->id);
230 if (wq->state != IDXD_WQ_ENABLED) {
231 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state);
235 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16);
243 wq->state = IDXD_WQ_DISABLED;
244 dev_dbg(dev, "WQ %d disabled\n", wq->id);
248 void idxd_wq_drain(struct idxd_wq *wq)
250 struct idxd_device *idxd = wq->idxd;
254 if (wq->state != IDXD_WQ_ENABLED) {
255 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state);
259 dev_dbg(dev, "Draining WQ %d\n", wq->id);
260 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16);
264 void idxd_wq_reset(struct idxd_wq *wq)
266 struct idxd_device *idxd = wq->idxd;
270 if (wq->state != IDXD_WQ_ENABLED) {
271 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state);
275 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16);
277 wq->state = IDXD_WQ_DISABLED;
280 int idxd_wq_map_portal(struct idxd_wq *wq)
282 struct idxd_device *idxd = wq->idxd;
288 start += idxd_get_wq_portal_full_offset(wq->id, IDXD_PORTAL_LIMITED);
290 wq->dportal = devm_ioremap(dev, start, IDXD_PORTAL_SIZE);
291 if (!wq->dportal)
293 dev_dbg(dev, "wq %d portal mapped at %p\n", wq->id, wq->dportal);
298 void idxd_wq_unmap_portal(struct idxd_wq *wq)
300 struct device *dev = &wq->idxd->pdev->dev;
302 devm_iounmap(dev, wq->dportal);
305 void idxd_wq_disable_cleanup(struct idxd_wq *wq)
307 struct idxd_device *idxd = wq->idxd;
310 memset(wq->wqcfg, 0, idxd->wqcfg_size);
311 wq->type = IDXD_WQT_NONE;
312 wq->size = 0;
313 wq->group = NULL;
314 wq->threshold = 0;
315 wq->priority = 0;
316 clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
317 memset(wq->name, 0, WQ_NAME_SIZE);
450 struct idxd_wq *wq = &idxd->wqs[i];
452 if (wq->state == IDXD_WQ_ENABLED) {
453 idxd_wq_disable_cleanup(wq);
454 wq->state = IDXD_WQ_DISABLED;
513 dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n",
558 static int idxd_wq_config_write(struct idxd_wq *wq)
560 struct idxd_device *idxd = wq->idxd;
565 if (!wq->group)
570 * wq reset. This will copy back the sticky values that are present on some devices.
573 wq_offset = WQCFG_OFFSET(idxd, wq->id, i);
574 wq->wqcfg->bits[i] = ioread32(idxd->reg_base + wq_offset);
578 wq->wqcfg->wq_size = wq->size;
580 if (wq->size == 0) {
586 wq->wqcfg->wq_thresh = wq->threshold;
589 wq->wqcfg->priv = !!(wq->type == IDXD_WQT_KERNEL);
590 wq->wqcfg->mode = 1;
591 wq->wqcfg->priority = wq->priority;
594 wq->wqcfg->max_xfer_shift = ilog2(wq->max_xfer_bytes);
595 wq->wqcfg->max_batch_shift = ilog2(wq->max_batch_size);
597 dev_dbg(dev, "WQ %d CFGs\n", wq->id);
599 wq_offset = WQCFG_OFFSET(idxd, wq->id, i);
600 iowrite32(wq->wqcfg->bits[i], idxd->reg_base + wq_offset);
602 wq->id, i, wq_offset,
614 struct idxd_wq *wq = &idxd->wqs[i];
616 rc = idxd_wq_config_write(wq);
680 struct idxd_wq *wq;
692 wq = &idxd->wqs[i];
693 group = wq->group;
695 if (!wq->group)
697 if (!wq->size)
700 if (!wq_dedicated(wq)) {
705 group->grpcfg.wqs[wq->id / 64] |= BIT(wq->id % 64);