Lines Matching refs:idma64c
59 static void idma64_chan_init(struct idma64 *idma64, struct idma64_chan *idma64c)
67 channel_writel(idma64c, CFG_LO, cfglo);
68 channel_writel(idma64c, CFG_HI, cfghi);
71 channel_set_bit(idma64, MASK(XFER), idma64c->mask);
72 channel_set_bit(idma64, MASK(ERROR), idma64c->mask);
84 static void idma64_chan_stop(struct idma64 *idma64, struct idma64_chan *idma64c)
86 channel_clear_bit(idma64, CH_EN, idma64c->mask);
89 static void idma64_chan_start(struct idma64 *idma64, struct idma64_chan *idma64c)
91 struct idma64_desc *desc = idma64c->desc;
94 channel_writeq(idma64c, SAR, 0);
95 channel_writeq(idma64c, DAR, 0);
97 channel_writel(idma64c, CTL_HI, IDMA64C_CTLH_BLOCK_TS(~0UL));
98 channel_writel(idma64c, CTL_LO, IDMA64C_CTLL_LLP_S_EN | IDMA64C_CTLL_LLP_D_EN);
100 channel_writeq(idma64c, LLP, hw->llp);
102 channel_set_bit(idma64, CH_EN, idma64c->mask);
105 static void idma64_stop_transfer(struct idma64_chan *idma64c)
107 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
109 idma64_chan_stop(idma64, idma64c);
112 static void idma64_start_transfer(struct idma64_chan *idma64c)
114 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
118 vdesc = vchan_next_desc(&idma64c->vchan);
120 idma64c->desc = NULL;
125 idma64c->desc = to_idma64_desc(vdesc);
128 idma64_chan_init(idma64, idma64c);
131 idma64_chan_start(idma64, idma64c);
139 struct idma64_chan *idma64c = &idma64->chan[c];
142 spin_lock(&idma64c->vchan.lock);
143 desc = idma64c->desc;
146 dma_writel(idma64, CLEAR(ERROR), idma64c->mask);
149 dma_writel(idma64, CLEAR(XFER), idma64c->mask);
152 idma64_start_transfer(idma64c);
155 /* idma64_start_transfer() updates idma64c->desc */
156 if (idma64c->desc == NULL || desc->status == DMA_ERROR)
157 idma64_stop_transfer(idma64c);
159 spin_unlock(&idma64c->vchan.lock);
204 static void idma64_desc_free(struct idma64_chan *idma64c,
214 dma_pool_free(idma64c->pool, hw->lli, hw->llp);
224 struct idma64_chan *idma64c = to_idma64_chan(vdesc->tx.chan);
226 idma64_desc_free(idma64c, to_idma64_desc(vdesc));
268 static void idma64_desc_fill(struct idma64_chan *idma64c,
271 struct dma_slave_config *config = &idma64c->config;
297 struct idma64_chan *idma64c = to_idma64_chan(chan);
310 hw->lli = dma_pool_alloc(idma64c->pool, GFP_NOWAIT, &hw->llp);
313 idma64_desc_free(idma64c, desc);
325 idma64_desc_fill(idma64c, desc);
326 return vchan_tx_prep(&idma64c->vchan, &desc->vdesc, flags);
331 struct idma64_chan *idma64c = to_idma64_chan(chan);
334 spin_lock_irqsave(&idma64c->vchan.lock, flags);
335 if (vchan_issue_pending(&idma64c->vchan) && !idma64c->desc)
336 idma64_start_transfer(idma64c);
337 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
340 static size_t idma64_active_desc_size(struct idma64_chan *idma64c)
342 struct idma64_desc *desc = idma64c->desc;
345 u64 llp = channel_readq(idma64c, LLP);
346 u32 ctlhi = channel_readl(idma64c, CTL_HI);
368 struct idma64_chan *idma64c = to_idma64_chan(chan);
378 spin_lock_irqsave(&idma64c->vchan.lock, flags);
379 vdesc = vchan_find_desc(&idma64c->vchan, cookie);
380 if (idma64c->desc && cookie == idma64c->desc->vdesc.tx.cookie) {
381 bytes = idma64_active_desc_size(idma64c);
383 status = idma64c->desc->status;
388 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
404 struct idma64_chan *idma64c = to_idma64_chan(chan);
406 memcpy(&idma64c->config, config, sizeof(idma64c->config));
408 convert_burst(&idma64c->config.src_maxburst);
409 convert_burst(&idma64c->config.dst_maxburst);
414 static void idma64_chan_deactivate(struct idma64_chan *idma64c, bool drain)
419 cfglo = channel_readl(idma64c, CFG_LO);
425 channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);
428 cfglo = channel_readl(idma64c, CFG_LO);
432 static void idma64_chan_activate(struct idma64_chan *idma64c)
436 cfglo = channel_readl(idma64c, CFG_LO);
437 channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);
442 struct idma64_chan *idma64c = to_idma64_chan(chan);
445 spin_lock_irqsave(&idma64c->vchan.lock, flags);
446 if (idma64c->desc && idma64c->desc->status == DMA_IN_PROGRESS) {
447 idma64_chan_deactivate(idma64c, false);
448 idma64c->desc->status = DMA_PAUSED;
450 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
457 struct idma64_chan *idma64c = to_idma64_chan(chan);
460 spin_lock_irqsave(&idma64c->vchan.lock, flags);
461 if (idma64c->desc && idma64c->desc->status == DMA_PAUSED) {
462 idma64c->desc->status = DMA_IN_PROGRESS;
463 idma64_chan_activate(idma64c);
465 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
472 struct idma64_chan *idma64c = to_idma64_chan(chan);
476 spin_lock_irqsave(&idma64c->vchan.lock, flags);
477 idma64_chan_deactivate(idma64c, true);
478 idma64_stop_transfer(idma64c);
479 if (idma64c->desc) {
480 idma64_vdesc_free(&idma64c->desc->vdesc);
481 idma64c->desc = NULL;
483 vchan_get_all_descriptors(&idma64c->vchan, &head);
484 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
486 vchan_dma_desc_free_list(&idma64c->vchan, &head);
492 struct idma64_chan *idma64c = to_idma64_chan(chan);
494 vchan_synchronize(&idma64c->vchan);
499 struct idma64_chan *idma64c = to_idma64_chan(chan);
502 idma64c->pool = dma_pool_create(dev_name(chan2dev(chan)),
505 if (!idma64c->pool) {
515 struct idma64_chan *idma64c = to_idma64_chan(chan);
518 dma_pool_destroy(idma64c->pool);
519 idma64c->pool = NULL;
560 struct idma64_chan *idma64c = &idma64->chan[i];
562 idma64c->vchan.desc_free = idma64_vdesc_free;
563 vchan_init(&idma64c->vchan, &idma64->dma);
565 idma64c->regs = idma64->regs + i * IDMA64_CH_LENGTH;
566 idma64c->mask = BIT(i);
617 struct idma64_chan *idma64c = &idma64->chan[i];
619 tasklet_kill(&idma64c->vchan.task);