Lines Matching refs:dma_dev
116 list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels, device_node) {
351 INIT_LIST_HEAD(&fsl_edma->dma_dev.channels);
361 vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);
372 dma_cap_set(DMA_PRIVATE, fsl_edma->dma_dev.cap_mask);
373 dma_cap_set(DMA_SLAVE, fsl_edma->dma_dev.cap_mask);
374 dma_cap_set(DMA_CYCLIC, fsl_edma->dma_dev.cap_mask);
376 fsl_edma->dma_dev.dev = &pdev->dev;
377 fsl_edma->dma_dev.device_alloc_chan_resources
379 fsl_edma->dma_dev.device_free_chan_resources
381 fsl_edma->dma_dev.device_tx_status = fsl_edma_tx_status;
382 fsl_edma->dma_dev.device_prep_slave_sg = fsl_edma_prep_slave_sg;
383 fsl_edma->dma_dev.device_prep_dma_cyclic = fsl_edma_prep_dma_cyclic;
384 fsl_edma->dma_dev.device_config = fsl_edma_slave_config;
385 fsl_edma->dma_dev.device_pause = fsl_edma_pause;
386 fsl_edma->dma_dev.device_resume = fsl_edma_resume;
387 fsl_edma->dma_dev.device_terminate_all = fsl_edma_terminate_all;
388 fsl_edma->dma_dev.device_synchronize = fsl_edma_synchronize;
389 fsl_edma->dma_dev.device_issue_pending = fsl_edma_issue_pending;
391 fsl_edma->dma_dev.src_addr_widths = FSL_EDMA_BUSWIDTHS;
392 fsl_edma->dma_dev.dst_addr_widths = FSL_EDMA_BUSWIDTHS;
393 fsl_edma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
397 ret = dma_async_device_register(&fsl_edma->dma_dev);
409 dma_async_device_unregister(&fsl_edma->dma_dev);
426 fsl_edma_cleanup_vchan(&fsl_edma->dma_dev);
428 dma_async_device_unregister(&fsl_edma->dma_dev);