Lines Matching refs:dma_dev
146 struct dma_device dma_dev;
153 dma_dev);
320 dev_dbg(dmac->dma_dev.dev,
324 dev_warn(dmac->dma_dev.dev,
878 dev_err(dmac->dma_dev.dev,
886 dev_err(dmac->dma_dev.dev,
907 struct dma_device *dma_dev;
951 dma_dev = &dmac->dma_dev;
952 dma_cap_set(DMA_SLAVE, dma_dev->cap_mask);
953 dma_cap_set(DMA_CYCLIC, dma_dev->cap_mask);
954 dma_cap_set(DMA_INTERLEAVE, dma_dev->cap_mask);
955 dma_dev->device_free_chan_resources = axi_dmac_free_chan_resources;
956 dma_dev->device_tx_status = dma_cookie_status;
957 dma_dev->device_issue_pending = axi_dmac_issue_pending;
958 dma_dev->device_prep_slave_sg = axi_dmac_prep_slave_sg;
959 dma_dev->device_prep_dma_cyclic = axi_dmac_prep_dma_cyclic;
960 dma_dev->device_prep_interleaved_dma = axi_dmac_prep_interleaved;
961 dma_dev->device_terminate_all = axi_dmac_terminate_all;
962 dma_dev->device_synchronize = axi_dmac_synchronize;
963 dma_dev->dev = &pdev->dev;
964 dma_dev->chancnt = 1;
965 dma_dev->src_addr_widths = BIT(dmac->chan.src_width);
966 dma_dev->dst_addr_widths = BIT(dmac->chan.dest_width);
967 dma_dev->directions = BIT(dmac->chan.direction);
968 dma_dev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
969 INIT_LIST_HEAD(&dma_dev->channels);
972 vchan_init(&dmac->chan.vchan, dma_dev);
978 dma_dev->copy_align = (dmac->chan.address_align_mask + 1);
982 ret = dma_async_device_register(dma_dev);
987 of_dma_xlate_by_chan_id, dma_dev);
1012 dma_async_device_unregister(&dmac->dma_dev);
1026 dma_async_device_unregister(&dmac->dma_dev);