Lines Matching refs:atchan
258 #define at_xdmac_chan_read(atchan, reg) readl_relaxed((atchan)->ch_regs + (reg))
259 #define at_xdmac_chan_write(atchan, reg, value) writel_relaxed((value), (atchan)->ch_regs + (reg))
281 static inline int at_xdmac_chan_is_cyclic(struct at_xdmac_chan *atchan)
283 return test_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status);
286 static inline int at_xdmac_chan_is_paused(struct at_xdmac_chan *atchan)
288 return test_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
318 static bool at_xdmac_chan_is_enabled(struct at_xdmac_chan *atchan)
320 return at_xdmac_chan_read(atchan, AT_XDMAC_GS) & atchan->mask;
335 static void at_xdmac_start_xfer(struct at_xdmac_chan *atchan,
338 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
341 dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, first);
348 | AT_XDMAC_CNDA_NDAIF(atchan->memif);
349 at_xdmac_chan_write(atchan, AT_XDMAC_CNDA, reg);
356 if (at_xdmac_chan_is_cyclic(atchan))
369 at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
374 at_xdmac_chan_write(atchan, AT_XDMAC_CNDC, reg);
376 dev_vdbg(chan2dev(&atchan->chan),
378 __func__, at_xdmac_chan_read(atchan, AT_XDMAC_CC),
379 at_xdmac_chan_read(atchan, AT_XDMAC_CNDA),
380 at_xdmac_chan_read(atchan, AT_XDMAC_CNDC),
381 at_xdmac_chan_read(atchan, AT_XDMAC_CSA),
382 at_xdmac_chan_read(atchan, AT_XDMAC_CDA),
383 at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
385 at_xdmac_chan_write(atchan, AT_XDMAC_CID, 0xffffffff);
397 if (at_xdmac_chan_is_cyclic(atchan))
398 at_xdmac_chan_write(atchan, AT_XDMAC_CIE,
401 at_xdmac_chan_write(atchan, AT_XDMAC_CIE,
403 at_xdmac_write(atxdmac, AT_XDMAC_GIE, atchan->mask);
404 dev_vdbg(chan2dev(&atchan->chan),
405 "%s: enable channel (0x%08x)\n", __func__, atchan->mask);
407 at_xdmac_write(atxdmac, AT_XDMAC_GE, atchan->mask);
409 dev_vdbg(chan2dev(&atchan->chan),
411 __func__, at_xdmac_chan_read(atchan, AT_XDMAC_CC),
412 at_xdmac_chan_read(atchan, AT_XDMAC_CNDA),
413 at_xdmac_chan_read(atchan, AT_XDMAC_CNDC),
414 at_xdmac_chan_read(atchan, AT_XDMAC_CSA),
415 at_xdmac_chan_read(atchan, AT_XDMAC_CDA),
416 at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
423 struct at_xdmac_chan *atchan = to_at_xdmac_chan(tx->chan);
427 spin_lock_irqsave(&atchan->lock, irqflags);
430 list_add_tail(&desc->xfer_node, &atchan->xfers_list);
431 spin_unlock_irqrestore(&atchan->lock, irqflags);
433 dev_vdbg(chan2dev(tx->chan), "%s: atchan 0x%p, add desc 0x%p to xfers_list\n",
434 __func__, atchan, desc);
467 static struct at_xdmac_desc *at_xdmac_get_desc(struct at_xdmac_chan *atchan)
471 if (list_empty(&atchan->free_descs_list)) {
472 desc = at_xdmac_alloc_desc(&atchan->chan, GFP_NOWAIT);
474 desc = list_first_entry(&atchan->free_descs_list,
514 struct at_xdmac_chan *atchan;
529 atchan = to_at_xdmac_chan(chan);
530 atchan->memif = AT91_XDMAC_DT_GET_MEM_IF(dma_spec->args[0]);
531 atchan->perif = AT91_XDMAC_DT_GET_PER_IF(dma_spec->args[0]);
532 atchan->perid = AT91_XDMAC_DT_GET_PERID(dma_spec->args[0]);
534 atchan->memif, atchan->perif, atchan->perid);
542 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
546 atchan->cfg =
547 AT91_XDMAC_DT_PERID(atchan->perid)
550 | AT_XDMAC_CC_DIF(atchan->memif)
551 | AT_XDMAC_CC_SIF(atchan->perif)
556 csize = ffs(atchan->sconfig.src_maxburst) - 1;
561 atchan->cfg |= AT_XDMAC_CC_CSIZE(csize);
562 dwidth = ffs(atchan->sconfig.src_addr_width) - 1;
567 atchan->cfg |= AT_XDMAC_CC_DWIDTH(dwidth);
569 atchan->cfg =
570 AT91_XDMAC_DT_PERID(atchan->perid)
573 | AT_XDMAC_CC_DIF(atchan->perif)
574 | AT_XDMAC_CC_SIF(atchan->memif)
579 csize = ffs(atchan->sconfig.dst_maxburst) - 1;
584 atchan->cfg |= AT_XDMAC_CC_CSIZE(csize);
585 dwidth = ffs(atchan->sconfig.dst_addr_width) - 1;
590 atchan->cfg |= AT_XDMAC_CC_DWIDTH(dwidth);
593 dev_dbg(chan2dev(chan), "%s: cfg=0x%08x\n", __func__, atchan->cfg);
619 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
626 memcpy(&atchan->sconfig, sconfig, sizeof(atchan->sconfig));
636 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
658 spin_lock_irqsave(&atchan->lock, irqflags);
677 desc = at_xdmac_get_desc(atchan);
682 &atchan->free_descs_list);
688 desc->lld.mbr_sa = atchan->sconfig.src_addr;
692 desc->lld.mbr_da = atchan->sconfig.dst_addr;
694 dwidth = at_xdmac_get_dwidth(atchan->cfg);
702 desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) |
729 spin_unlock_irqrestore(&atchan->lock, irqflags);
739 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
754 if (test_and_set_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status)) {
765 spin_lock_irqsave(&atchan->lock, irqflags);
766 desc = at_xdmac_get_desc(atchan);
771 &atchan->free_descs_list);
772 spin_unlock_irqrestore(&atchan->lock, irqflags);
775 spin_unlock_irqrestore(&atchan->lock, irqflags);
781 desc->lld.mbr_sa = atchan->sconfig.src_addr;
785 desc->lld.mbr_da = atchan->sconfig.dst_addr;
787 desc->lld.mbr_cfg = atchan->cfg;
849 struct at_xdmac_chan *atchan,
904 spin_lock_irqsave(&atchan->lock, flags);
905 desc = at_xdmac_get_desc(atchan);
906 spin_unlock_irqrestore(&atchan->lock, flags);
944 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
969 first = at_xdmac_interleaved_queue_desc(chan, atchan,
1000 desc = at_xdmac_interleaved_queue_desc(chan, atchan,
1007 &atchan->free_descs_list);
1040 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1079 spin_lock_irqsave(&atchan->lock, irqflags);
1080 desc = at_xdmac_get_desc(atchan);
1081 spin_unlock_irqrestore(&atchan->lock, irqflags);
1086 &atchan->free_descs_list);
1142 struct at_xdmac_chan *atchan,
1181 spin_lock_irqsave(&atchan->lock, flags);
1182 desc = at_xdmac_get_desc(atchan);
1183 spin_unlock_irqrestore(&atchan->lock, flags);
1213 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1222 desc = at_xdmac_memset_create_desc(chan, atchan, dest, len, value);
1237 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1255 desc = at_xdmac_memset_create_desc(chan, atchan,
1261 &atchan->free_descs_list);
1310 &atchan->free_descs_list);
1373 &atchan->free_descs_list);
1398 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1399 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1416 spin_lock_irqsave(&atchan->lock, flags);
1418 desc = list_first_entry(&atchan->xfers_list, struct at_xdmac_desc, xfer_node);
1446 at_xdmac_write(atxdmac, AT_XDMAC_GSWF, atchan->mask);
1447 while (!(at_xdmac_chan_read(atchan, AT_XDMAC_CIS) & AT_XDMAC_CIS_FIS))
1478 check_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;
1480 cur_ubc = at_xdmac_chan_read(atchan, AT_XDMAC_CUBC);
1482 initd = !!(at_xdmac_chan_read(atchan, AT_XDMAC_CC) & AT_XDMAC_CC_INITD);
1484 cur_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;
1504 at_xdmac_write(atxdmac, AT_XDMAC_GSWF, atchan->mask);
1505 while (!(at_xdmac_chan_read(atchan, AT_XDMAC_CIS) & AT_XDMAC_CIS_FIS))
1532 spin_unlock_irqrestore(&atchan->lock, flags);
1536 static void at_xdmac_advance_work(struct at_xdmac_chan *atchan)
1544 if (!at_xdmac_chan_is_enabled(atchan) && !list_empty(&atchan->xfers_list)) {
1545 desc = list_first_entry(&atchan->xfers_list,
1548 dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, desc);
1550 at_xdmac_start_xfer(atchan, desc);
1554 static void at_xdmac_handle_cyclic(struct at_xdmac_chan *atchan)
1559 spin_lock_irq(&atchan->lock);
1560 if (list_empty(&atchan->xfers_list)) {
1561 spin_unlock_irq(&atchan->lock);
1564 desc = list_first_entry(&atchan->xfers_list, struct at_xdmac_desc,
1566 spin_unlock_irq(&atchan->lock);
1572 static void at_xdmac_handle_error(struct at_xdmac_chan *atchan)
1574 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1583 if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
1584 dev_err(chan2dev(&atchan->chan), "read bus error!!!");
1585 if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
1586 dev_err(chan2dev(&atchan->chan), "write bus error!!!");
1587 if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
1588 dev_err(chan2dev(&atchan->chan), "request overflow error!!!");
1590 spin_lock_irq(&atchan->lock);
1593 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
1594 while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
1597 bad_desc = list_first_entry(&atchan->xfers_list,
1601 spin_unlock_irq(&atchan->lock);
1604 dev_dbg(chan2dev(&atchan->chan),
1614 struct at_xdmac_chan *atchan = from_tasklet(atchan, t, tasklet);
1618 dev_dbg(chan2dev(&atchan->chan), "%s: status=0x%08x\n",
1619 __func__, atchan->irq_status);
1625 if (at_xdmac_chan_is_cyclic(atchan)) {
1626 at_xdmac_handle_cyclic(atchan);
1627 } else if ((atchan->irq_status & AT_XDMAC_CIS_LIS)
1628 || (atchan->irq_status & error_mask)) {
1631 if (atchan->irq_status & error_mask)
1632 at_xdmac_handle_error(atchan);
1634 spin_lock_irq(&atchan->lock);
1635 desc = list_first_entry(&atchan->xfers_list,
1638 dev_vdbg(chan2dev(&atchan->chan), "%s: desc 0x%p\n", __func__, desc);
1640 dev_err(chan2dev(&atchan->chan), "Xfer not active: exiting");
1641 spin_unlock_irq(&atchan->lock);
1649 spin_unlock_irq(&atchan->lock);
1656 spin_lock_irq(&atchan->lock);
1659 &atchan->free_descs_list);
1660 at_xdmac_advance_work(atchan);
1661 spin_unlock_irq(&atchan->lock);
1668 struct at_xdmac_chan *atchan;
1690 atchan = &atxdmac->chan[i];
1691 chan_imr = at_xdmac_chan_read(atchan, AT_XDMAC_CIM);
1692 chan_status = at_xdmac_chan_read(atchan, AT_XDMAC_CIS);
1693 atchan->irq_status = chan_status & chan_imr;
1697 dev_vdbg(chan2dev(&atchan->chan),
1700 at_xdmac_chan_read(atchan, AT_XDMAC_CC),
1701 at_xdmac_chan_read(atchan, AT_XDMAC_CNDA),
1702 at_xdmac_chan_read(atchan, AT_XDMAC_CNDC),
1703 at_xdmac_chan_read(atchan, AT_XDMAC_CSA),
1704 at_xdmac_chan_read(atchan, AT_XDMAC_CDA),
1705 at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
1707 if (atchan->irq_status & (AT_XDMAC_CIS_RBEIS | AT_XDMAC_CIS_WBEIS))
1708 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
1710 tasklet_schedule(&atchan->tasklet);
1721 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1724 dev_dbg(chan2dev(&atchan->chan), "%s\n", __func__);
1726 spin_lock_irqsave(&atchan->lock, flags);
1727 at_xdmac_advance_work(atchan);
1728 spin_unlock_irqrestore(&atchan->lock, flags);
1736 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1742 spin_lock_irqsave(&atchan->lock, flags);
1744 spin_unlock_irqrestore(&atchan->lock, flags);
1751 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1752 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1757 if (test_and_set_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status))
1760 spin_lock_irqsave(&atchan->lock, flags);
1761 at_xdmac_write(atxdmac, AT_XDMAC_GRWS, atchan->mask);
1762 while (at_xdmac_chan_read(atchan, AT_XDMAC_CC)
1765 spin_unlock_irqrestore(&atchan->lock, flags);
1772 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1773 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1778 spin_lock_irqsave(&atchan->lock, flags);
1779 if (!at_xdmac_chan_is_paused(atchan)) {
1780 spin_unlock_irqrestore(&atchan->lock, flags);
1784 at_xdmac_write(atxdmac, AT_XDMAC_GRWR, atchan->mask);
1785 clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
1786 spin_unlock_irqrestore(&atchan->lock, flags);
1794 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1795 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1800 spin_lock_irqsave(&atchan->lock, flags);
1801 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
1802 while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
1806 list_for_each_entry_safe(desc, _desc, &atchan->xfers_list, xfer_node) {
1809 &atchan->free_descs_list);
1812 clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
1813 clear_bit(AT_XDMAC_CHAN_IS_CYCLIC, &atchan->status);
1814 spin_unlock_irqrestore(&atchan->lock, flags);
1821 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1825 if (at_xdmac_chan_is_enabled(atchan)) {
1831 if (!list_empty(&atchan->free_descs_list)) {
1849 list_add_tail(&desc->desc_node, &atchan->free_descs_list);
1861 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1865 list_for_each_entry_safe(desc, _desc, &atchan->free_descs_list, desc_node) {
1881 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1884 if (at_xdmac_chan_is_enabled(atchan) && !at_xdmac_chan_is_cyclic(atchan))
1900 struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan);
1902 atchan->save_cc = at_xdmac_chan_read(atchan, AT_XDMAC_CC);
1903 if (at_xdmac_chan_is_cyclic(atchan)) {
1904 if (!at_xdmac_chan_is_paused(atchan))
1906 atchan->save_cim = at_xdmac_chan_read(atchan, AT_XDMAC_CIM);
1907 atchan->save_cnda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA);
1908 atchan->save_cndc = at_xdmac_chan_read(atchan, AT_XDMAC_CNDC);
1922 struct at_xdmac_chan *atchan;
1933 atchan = &atxdmac->chan[i];
1934 while (at_xdmac_chan_read(atchan, AT_XDMAC_CIS))
1940 atchan = to_at_xdmac_chan(chan);
1941 at_xdmac_chan_write(atchan, AT_XDMAC_CC, atchan->save_cc);
1942 if (at_xdmac_chan_is_cyclic(atchan)) {
1943 if (at_xdmac_chan_is_paused(atchan))
1945 at_xdmac_chan_write(atchan, AT_XDMAC_CNDA, atchan->save_cnda);
1946 at_xdmac_chan_write(atchan, AT_XDMAC_CNDC, atchan->save_cndc);
1947 at_xdmac_chan_write(atchan, AT_XDMAC_CIE, atchan->save_cim);
1949 if (atxdmac->save_gs & atchan->mask)
1950 at_xdmac_write(atxdmac, AT_XDMAC_GE, atchan->mask);
2061 struct at_xdmac_chan *atchan = &atxdmac->chan[i];
2063 atchan->chan.device = &atxdmac->dma;
2064 list_add_tail(&atchan->chan.device_node,
2067 atchan->ch_regs = at_xdmac_chan_reg_base(atxdmac, i);
2068 atchan->mask = 1 << i;
2070 spin_lock_init(&atchan->lock);
2071 INIT_LIST_HEAD(&atchan->xfers_list);
2072 INIT_LIST_HEAD(&atchan->free_descs_list);
2073 tasklet_setup(&atchan->tasklet, at_xdmac_tasklet);
2076 while (at_xdmac_chan_read(atchan, AT_XDMAC_CIS))
2121 struct at_xdmac_chan *atchan = &atxdmac->chan[i];
2123 tasklet_kill(&atchan->tasklet);
2124 at_xdmac_free_chan_resources(&atchan->chan);