Lines Matching refs:tegra
193 static u32 actmon_readl(struct tegra_devfreq *tegra, u32 offset)
195 return readl_relaxed(tegra->regs + offset);
198 static void actmon_writel(struct tegra_devfreq *tegra, u32 val, u32 offset)
200 writel_relaxed(val, tegra->regs + offset);
226 static void tegra_devfreq_update_avg_wmark(struct tegra_devfreq *tegra,
229 u32 avg_band_freq = tegra->max_freq * ACTMON_DEFAULT_AVG_BAND / KHZ;
230 u32 band = avg_band_freq * tegra->devfreq->profile->polling_ms;
240 static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
243 u32 val = tegra->cur_freq * tegra->devfreq->profile->polling_ms;
252 static void actmon_isr_device(struct tegra_devfreq *tegra,
258 tegra_devfreq_update_avg_wmark(tegra, dev);
273 if (dev->boost_freq >= tegra->max_freq) {
275 dev->boost_freq = tegra->max_freq;
298 static unsigned long actmon_cpu_to_emc_rate(struct tegra_devfreq *tegra,
306 if (ratio->emc_freq >= tegra->max_freq)
307 return tegra->max_freq;
316 static unsigned long actmon_device_target_freq(struct tegra_devfreq *tegra,
322 target_freq = dev->avg_count / tegra->devfreq->profile->polling_ms;
329 static void actmon_update_target(struct tegra_devfreq *tegra,
335 dev->target_freq = actmon_device_target_freq(tegra, dev);
340 static_cpu_emc_freq = actmon_cpu_to_emc_rate(tegra, cpu_freq);
351 struct tegra_devfreq *tegra = data;
356 mutex_lock(&tegra->devfreq->lock);
358 val = actmon_readl(tegra, ACTMON_GLB_STATUS);
359 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
360 if (val & tegra->devices[i].config->irq_mask) {
361 actmon_isr_device(tegra, tegra->devices + i);
367 update_devfreq(tegra->devfreq);
369 mutex_unlock(&tegra->devfreq->lock);
378 struct tegra_devfreq *tegra;
385 tegra = container_of(nb, struct tegra_devfreq, clk_rate_change_nb);
387 tegra->cur_freq = data->new_rate / KHZ;
389 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
390 dev = &tegra->devices[i];
392 tegra_devfreq_update_wmark(tegra, dev);
400 struct tegra_devfreq *tegra = container_of(work, struct tegra_devfreq,
403 mutex_lock(&tegra->devfreq->lock);
404 update_devfreq(tegra->devfreq);
405 mutex_unlock(&tegra->devfreq->lock);
409 tegra_actmon_cpufreq_contribution(struct tegra_devfreq *tegra,
412 struct tegra_devfreq_device *actmon_dev = &tegra->devices[MCCPU];
415 dev_freq = actmon_device_target_freq(tegra, actmon_dev);
421 static_cpu_emc_freq = actmon_cpu_to_emc_rate(tegra, cpu_freq);
433 struct tegra_devfreq *tegra;
439 tegra = container_of(nb, struct tegra_devfreq, cpu_rate_change_nb);
445 if (mutex_trylock(&tegra->devfreq->lock)) {
446 old = tegra_actmon_cpufreq_contribution(tegra, freqs->old);
447 new = tegra_actmon_cpufreq_contribution(tegra, freqs->new);
448 mutex_unlock(&tegra->devfreq->lock);
467 schedule_delayed_work(&tegra->cpufreq_update_work, delay);
472 static void tegra_actmon_configure_device(struct tegra_devfreq *tegra,
480 dev->target_freq = tegra->cur_freq;
482 dev->avg_count = tegra->cur_freq * tegra->devfreq->profile->polling_ms;
485 tegra_devfreq_update_avg_wmark(tegra, dev);
486 tegra_devfreq_update_wmark(tegra, dev);
506 static void tegra_actmon_stop_devices(struct tegra_devfreq *tegra)
508 struct tegra_devfreq_device *dev = tegra->devices;
511 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++, dev++) {
518 static int tegra_actmon_resume(struct tegra_devfreq *tegra)
523 if (!tegra->devfreq->profile->polling_ms || !tegra->started)
526 actmon_writel(tegra, tegra->devfreq->profile->polling_ms - 1,
534 err = clk_notifier_register(tegra->emc_clock,
535 &tegra->clk_rate_change_nb);
537 dev_err(tegra->devfreq->dev.parent,
542 tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ;
544 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++)
545 tegra_actmon_configure_device(tegra, &tegra->devices[i]);
554 err = cpufreq_register_notifier(&tegra->cpu_rate_change_nb,
557 dev_err(tegra->devfreq->dev.parent,
562 enable_irq(tegra->irq);
567 tegra_actmon_stop_devices(tegra);
569 clk_notifier_unregister(tegra->emc_clock, &tegra->clk_rate_change_nb);
574 static int tegra_actmon_start(struct tegra_devfreq *tegra)
578 if (!tegra->started) {
579 tegra->started = true;
581 ret = tegra_actmon_resume(tegra);
583 tegra->started = false;
589 static void tegra_actmon_pause(struct tegra_devfreq *tegra)
591 if (!tegra->devfreq->profile->polling_ms || !tegra->started)
594 disable_irq(tegra->irq);
596 cpufreq_unregister_notifier(&tegra->cpu_rate_change_nb,
599 cancel_delayed_work_sync(&tegra->cpufreq_update_work);
601 tegra_actmon_stop_devices(tegra);
603 clk_notifier_unregister(tegra->emc_clock, &tegra->clk_rate_change_nb);
606 static void tegra_actmon_stop(struct tegra_devfreq *tegra)
608 tegra_actmon_pause(tegra);
609 tegra->started = false;
615 struct tegra_devfreq *tegra = dev_get_drvdata(dev);
616 struct devfreq *devfreq = tegra->devfreq;
629 err = clk_set_min_rate(tegra->emc_clock, rate * KHZ);
633 err = clk_set_rate(tegra->emc_clock, 0);
640 clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq);
648 struct tegra_devfreq *tegra = dev_get_drvdata(dev);
652 cur_freq = READ_ONCE(tegra->cur_freq);
654 /* To be used by the tegra governor */
655 stat->private_data = tegra;
660 actmon_dev = &tegra->devices[MCALL];
669 stat->total_time = tegra->devfreq->profile->polling_ms * cur_freq;
686 struct tegra_devfreq *tegra;
698 tegra = stat->private_data;
700 for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
701 dev = &tegra->devices[i];
703 actmon_update_target(tegra, dev);
716 struct tegra_devfreq *tegra = dev_get_drvdata(devfreq->dev.parent);
724 tegra->devfreq = devfreq;
729 ret = tegra_actmon_start(tegra);
733 tegra_actmon_stop(tegra);
747 tegra_actmon_pause(tegra);
749 ret = tegra_actmon_resume(tegra);
753 tegra_actmon_stop(tegra);
759 ret = tegra_actmon_start(tegra);
777 struct tegra_devfreq *tegra;
783 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
784 if (!tegra)
787 tegra->regs = devm_platform_ioremap_resource(pdev, 0);
788 if (IS_ERR(tegra->regs))
789 return PTR_ERR(tegra->regs);
791 tegra->reset = devm_reset_control_get(&pdev->dev, "actmon");
792 if (IS_ERR(tegra->reset)) {
794 return PTR_ERR(tegra->reset);
797 tegra->clock = devm_clk_get(&pdev->dev, "actmon");
798 if (IS_ERR(tegra->clock)) {
800 return PTR_ERR(tegra->clock);
803 tegra->emc_clock = devm_clk_get(&pdev->dev, "emc");
804 if (IS_ERR(tegra->emc_clock)) {
806 return PTR_ERR(tegra->emc_clock);
813 tegra->irq = err;
815 irq_set_status_flags(tegra->irq, IRQ_NOAUTOEN);
817 err = devm_request_threaded_irq(&pdev->dev, tegra->irq, NULL,
819 "tegra-devfreq", tegra);
825 err = clk_prepare_enable(tegra->clock);
832 err = reset_control_reset(tegra->reset);
838 rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
845 tegra->max_freq = rate / KHZ;
848 dev = tegra->devices + i;
850 dev->regs = tegra->regs + dev->config->offset;
853 for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) {
854 rate = clk_round_rate(tegra->emc_clock, rate);
870 platform_set_drvdata(pdev, tegra);
872 tegra->clk_rate_change_nb.notifier_call = tegra_actmon_clk_notify_cb;
873 tegra->cpu_rate_change_nb.notifier_call = tegra_actmon_cpu_notify_cb;
875 INIT_DELAYED_WORK(&tegra->cpufreq_update_work,
884 tegra_devfreq_profile.initial_freq = clk_get_rate(tegra->emc_clock);
902 reset_control_reset(tegra->reset);
904 clk_disable_unprepare(tegra->clock);
911 struct tegra_devfreq *tegra = platform_get_drvdata(pdev);
913 devfreq_remove_device(tegra->devfreq);
918 reset_control_reset(tegra->reset);
919 clk_disable_unprepare(tegra->clock);
936 .name = "tegra-devfreq",