Lines Matching refs:tegra
18 #include <soc/tegra/mc.h>
40 struct tegra_devfreq *tegra = dev_get_drvdata(dev);
41 struct devfreq *devfreq = tegra->devfreq;
53 err = clk_set_min_rate(tegra->emc_clock, rate);
57 err = clk_set_rate(tegra->emc_clock, 0);
64 clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq);
72 struct tegra_devfreq *tegra = dev_get_drvdata(dev);
84 stat->busy_time = readl_relaxed(tegra->regs + MC_STAT_EMC_COUNT);
85 stat->total_time = readl_relaxed(tegra->regs + MC_STAT_EMC_CLOCKS) / 8;
86 stat->current_frequency = clk_get_rate(tegra->emc_clock);
88 writel_relaxed(EMC_GATHER_CLEAR, tegra->regs + MC_STAT_CONTROL);
89 writel_relaxed(EMC_GATHER_ENABLE, tegra->regs + MC_STAT_CONTROL);
124 struct tegra_devfreq *tegra;
138 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
139 if (!tegra)
143 tegra->emc_clock = devm_clk_get(&pdev->dev, "emc");
144 if (IS_ERR(tegra->emc_clock)) {
145 err = PTR_ERR(tegra->emc_clock);
150 tegra->regs = mc->regs;
152 max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
155 rate = clk_round_rate(tegra->emc_clock, rate);
169 writel_relaxed(0x00000000, tegra->regs + MC_STAT_CONTROL);
170 writel_relaxed(0x00000000, tegra->regs + MC_STAT_EMC_CONTROL);
171 writel_relaxed(0xffffffff, tegra->regs + MC_STAT_EMC_CLOCK_LIMIT);
173 platform_set_drvdata(pdev, tegra);
175 tegra->devfreq = devfreq_add_device(&pdev->dev, &tegra_devfreq_profile,
177 if (IS_ERR(tegra->devfreq)) {
178 err = PTR_ERR(tegra->devfreq);
192 struct tegra_devfreq *tegra = platform_get_drvdata(pdev);
194 devfreq_remove_device(tegra->devfreq);