Lines Matching refs:timing
65 struct dram_timing timing;
241 static int of_get_ddr_timings(struct dram_timing *timing,
247 &timing->ddr3_speed_bin);
249 &timing->pd_idle);
251 &timing->sr_idle);
253 &timing->sr_mc_gate_idle);
255 &timing->srpd_lite_idle);
257 &timing->standby_idle);
259 &timing->auto_pd_dis_freq);
261 &timing->dram_dll_dis_freq);
263 &timing->phy_dll_dis_freq);
265 &timing->ddr3_odt_dis_freq);
267 &timing->ddr3_drv);
269 &timing->ddr3_odt);
271 &timing->phy_ddr3_ca_drv);
273 &timing->phy_ddr3_dq_drv);
275 &timing->phy_ddr3_odt);
277 &timing->lpddr3_odt_dis_freq);
279 &timing->lpddr3_drv);
281 &timing->lpddr3_odt);
283 &timing->phy_lpddr3_ca_drv);
285 &timing->phy_lpddr3_dq_drv);
287 &timing->phy_lpddr3_odt);
289 &timing->lpddr4_odt_dis_freq);
291 &timing->lpddr4_drv);
293 &timing->lpddr4_dq_odt);
295 &timing->lpddr4_ca_odt);
297 &timing->phy_lpddr4_ca_drv);
299 &timing->phy_lpddr4_ck_cs_drv);
301 &timing->phy_lpddr4_dq_drv);
303 &timing->phy_lpddr4_odt);
315 uint32_t *timing;
355 * Get dram timing and pass it to arm trust firmware,
357 * timing and to do dram initial.
359 if (!of_get_ddr_timings(&data->timing, np)) {
360 timing = &data->timing.ddr3_speed_bin;
363 arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, *timing++, index,
392 data->odt_dis_freq = data->timing.ddr3_odt_dis_freq;
395 data->odt_dis_freq = data->timing.lpddr3_odt_dis_freq;
398 data->odt_dis_freq = data->timing.lpddr4_odt_dis_freq;
425 data->odt_pd_arg0 = (data->timing.sr_idle & 0xff) |
426 ((data->timing.sr_mc_gate_idle & 0xff) << 8) |
427 ((data->timing.standby_idle & 0xffff) << 16);
428 data->odt_pd_arg1 = (data->timing.pd_idle & 0xfff) |
429 ((data->timing.srpd_lite_idle & 0xfff) << 16);