Lines Matching refs:cryp
120 static void mtk_desc_ring_link(struct mtk_cryp *cryp, u32 mask)
123 writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DFE_THR_CTRL);
124 writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DSE_THR_CTRL);
127 static void mtk_dfe_dse_buf_setup(struct mtk_cryp *cryp,
140 cryp->base + DFE_CFG);
144 cryp->base + DSE_CFG);
148 cryp->base + PE_IN_DBUF_THRESH);
152 cryp->base + PE_IN_TBUF_THRESH);
156 cryp->base + PE_OUT_DBUF_THRESH);
158 writel(0, cryp->base + PE_OUT_TBUF_THRESH);
159 writel(0, cryp->base + PE_OUT_BUF_CTRL);
162 static int mtk_dfe_dse_state_check(struct mtk_cryp *cryp)
168 val = readl(cryp->base + DFE_THR_STAT);
170 val = readl(cryp->base + DSE_THR_STAT);
177 writel(0, cryp->base + DFE_THR_CTRL);
178 writel(0, cryp->base + DSE_THR_CTRL);
186 static int mtk_dfe_dse_reset(struct mtk_cryp *cryp)
189 writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DFE_THR_CTRL);
190 writel(0, cryp->base + DFE_PRIO_0);
191 writel(0, cryp->base + DFE_PRIO_1);
192 writel(0, cryp->base + DFE_PRIO_2);
193 writel(0, cryp->base + DFE_PRIO_3);
195 writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DSE_THR_CTRL);
196 writel(0, cryp->base + DSE_PRIO_0);
197 writel(0, cryp->base + DSE_PRIO_1);
198 writel(0, cryp->base + DSE_PRIO_2);
199 writel(0, cryp->base + DSE_PRIO_3);
201 return mtk_dfe_dse_state_check(cryp);
204 static void mtk_cmd_desc_ring_setup(struct mtk_cryp *cryp,
212 writel(0, cryp->base + CDR_CFG(i));
215 writel(MTK_CNT_RST, cryp->base + CDR_PREP_COUNT(i));
216 writel(MTK_CNT_RST, cryp->base + CDR_PROC_COUNT(i));
218 writel(0, cryp->base + CDR_PREP_PNTR(i));
219 writel(0, cryp->base + CDR_PROC_PNTR(i));
220 writel(0, cryp->base + CDR_DMA_CFG(i));
223 writel(0, cryp->base + CDR_BASE_ADDR_HI(i));
224 writel(cryp->ring[i]->cmd_dma, cryp->base + CDR_BASE_ADDR_LO(i));
226 writel(MTK_DESC_RING_SZ, cryp->base + CDR_RING_SIZE(i));
229 writel(MTK_CDR_STAT_CLR, cryp->base + CDR_STAT(i));
238 cryp->base + CDR_DESC_SIZE(i));
242 cryp->base + CDR_CFG(i));
245 static void mtk_res_desc_ring_setup(struct mtk_cryp *cryp,
252 writel(0, cryp->base + RDR_CFG(i));
255 writel(MTK_CNT_RST, cryp->base + RDR_PREP_COUNT(i));
256 writel(MTK_CNT_RST, cryp->base + RDR_PROC_COUNT(i));
258 writel(0, cryp->base + RDR_PREP_PNTR(i));
259 writel(0, cryp->base + RDR_PROC_PNTR(i));
260 writel(0, cryp->base + RDR_DMA_CFG(i));
263 writel(0, cryp->base + RDR_BASE_ADDR_HI(i));
264 writel(cryp->ring[i]->res_dma, cryp->base + RDR_BASE_ADDR_LO(i));
266 writel(MTK_DESC_RING_SZ, cryp->base + RDR_RING_SIZE(i));
267 writel(MTK_RDR_STAT_CLR, cryp->base + RDR_STAT(i));
275 cryp->base + RDR_THRESH(i));
283 cryp->base + RDR_DESC_SIZE(i));
292 cryp->base + RDR_CFG(i));
295 static int mtk_packet_engine_setup(struct mtk_cryp *cryp)
301 cap.hia_ver = readl(cryp->base + HIA_VERSION);
302 cap.hia_opt = readl(cryp->base + HIA_OPTIONS);
303 cap.hw_opt = readl(cryp->base + EIP97_OPTIONS);
309 writel(0, cryp->base + EIP97_MST_CTRL);
312 val = readl(cryp->base + HIA_MST_CTRL);
315 writel(val, cryp->base + HIA_MST_CTRL);
317 err = mtk_dfe_dse_reset(cryp);
319 dev_err(cryp->dev, "Failed to reset DFE and DSE.\n");
323 mtk_dfe_dse_buf_setup(cryp, &cap);
326 mtk_desc_ring_link(cryp, 0xf);
329 mtk_cmd_desc_ring_setup(cryp, i, &cap);
330 mtk_res_desc_ring_setup(cryp, i, &cap);
334 cryp->base + PE_TOKEN_CTRL_STAT);
337 writel(MTK_AIC_G_CLR, cryp->base + AIC_G_ACK);
344 cryp->base + PE_INTERRUPT_CTRL_STAT);
349 static int mtk_aic_cap_check(struct mtk_cryp *cryp, int hw)
354 val = readl(cryp->base + AIC_G_VERSION);
356 val = readl(cryp->base + AIC_VERSION(hw));
363 val = readl(cryp->base + AIC_G_OPTIONS);
365 val = readl(cryp->base + AIC_OPTIONS(hw));
374 static int mtk_aic_init(struct mtk_cryp *cryp, int hw)
378 err = mtk_aic_cap_check(cryp, hw);
384 writel(0, cryp->base + AIC_G_ENABLE_CTRL);
385 writel(0, cryp->base + AIC_G_POL_CTRL);
386 writel(0, cryp->base + AIC_G_TYPE_CTRL);
387 writel(0, cryp->base + AIC_G_ENABLE_SET);
389 writel(0, cryp->base + AIC_ENABLE_CTRL(hw));
390 writel(0, cryp->base + AIC_POL_CTRL(hw));
391 writel(0, cryp->base + AIC_TYPE_CTRL(hw));
392 writel(0, cryp->base + AIC_ENABLE_SET(hw));
398 static int mtk_accelerator_init(struct mtk_cryp *cryp)
404 err = mtk_aic_init(cryp, i);
406 dev_err(cryp->dev, "Failed to initialize AIC.\n");
412 err = mtk_packet_engine_setup(cryp);
414 dev_err(cryp->dev, "Failed to configure packet engine.\n");
421 static void mtk_desc_dma_free(struct mtk_cryp *cryp)
426 dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ,
427 cryp->ring[i]->res_base,
428 cryp->ring[i]->res_dma);
429 dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ,
430 cryp->ring[i]->cmd_base,
431 cryp->ring[i]->cmd_dma);
432 kfree(cryp->ring[i]);
436 static int mtk_desc_ring_alloc(struct mtk_cryp *cryp)
438 struct mtk_ring **ring = cryp->ring;
446 ring[i]->cmd_base = dma_alloc_coherent(cryp->dev,
453 ring[i]->res_base = dma_alloc_coherent(cryp->dev,
467 dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ,
469 dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ,
478 struct mtk_cryp *cryp;
481 cryp = devm_kzalloc(&pdev->dev, sizeof(*cryp), GFP_KERNEL);
482 if (!cryp)
485 cryp->base = devm_platform_ioremap_resource(pdev, 0);
486 if (IS_ERR(cryp->base))
487 return PTR_ERR(cryp->base);
490 cryp->irq[i] = platform_get_irq(pdev, i);
491 if (cryp->irq[i] < 0)
492 return cryp->irq[i];
495 cryp->clk_cryp = devm_clk_get(&pdev->dev, "cryp");
496 if (IS_ERR(cryp->clk_cryp))
499 cryp->dev = &pdev->dev;
500 pm_runtime_enable(cryp->dev);
501 pm_runtime_get_sync(cryp->dev);
503 err = clk_prepare_enable(cryp->clk_cryp);
508 err = mtk_desc_ring_alloc(cryp);
510 dev_err(cryp->dev, "Unable to allocate descriptor rings.\n");
515 err = mtk_accelerator_init(cryp);
517 dev_err(cryp->dev, "Failed to initialize cryptographic engine.\n");
521 err = mtk_cipher_alg_register(cryp);
523 dev_err(cryp->dev, "Unable to register cipher algorithm.\n");
527 err = mtk_hash_alg_register(cryp);
529 dev_err(cryp->dev, "Unable to register hash algorithm.\n");
533 platform_set_drvdata(pdev, cryp);
537 mtk_cipher_alg_release(cryp);
539 mtk_dfe_dse_reset(cryp);
541 mtk_desc_dma_free(cryp);
543 clk_disable_unprepare(cryp->clk_cryp);
545 pm_runtime_put_sync(cryp->dev);
546 pm_runtime_disable(cryp->dev);
553 struct mtk_cryp *cryp = platform_get_drvdata(pdev);
555 mtk_hash_alg_release(cryp);
556 mtk_cipher_alg_release(cryp);
557 mtk_desc_dma_free(cryp);
559 clk_disable_unprepare(cryp->clk_cryp);
561 pm_runtime_put_sync(cryp->dev);
562 pm_runtime_disable(cryp->dev);