Lines Matching refs:dmacsr
1853 u32 dmacsr, restart;
1855 dmacsr = hifn_read_1(dev, HIFN_1_DMA_CSR);
1857 dev_dbg(&dev->pdev->dev, "1 dmacsr: %08x, dmareg: %08x, res: %08x [%d], "
1859 dmacsr, dev->dmareg, dmacsr & dev->dmareg, dma->cmdi,
1863 if ((dmacsr & dev->dmareg) == 0)
1866 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg);
1868 if (dmacsr & HIFN_DMACSR_ENGINE)
1870 if (dmacsr & HIFN_DMACSR_PUBDONE)
1874 restart = dmacsr & (HIFN_DMACSR_R_OVER | HIFN_DMACSR_D_OVER);
1879 !!(dmacsr & HIFN_DMACSR_R_OVER),
1880 !!(dmacsr & HIFN_DMACSR_D_OVER),
1884 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER |
1888 restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT |
1892 !!(dmacsr & HIFN_DMACSR_C_ABORT),
1893 !!(dmacsr & HIFN_DMACSR_S_ABORT),
1894 !!(dmacsr & HIFN_DMACSR_D_ABORT),
1895 !!(dmacsr & HIFN_DMACSR_R_ABORT));
1901 if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->cmdu == 0)) {