Lines Matching refs:idx
303 unsigned int idx = 0;
309 hw_desc_init(&desc[idx]);
310 set_cipher_mode(&desc[idx], hash_mode);
311 set_din_sram(&desc[idx],
315 set_flow_mode(&desc[idx], S_DIN_to_HASH);
316 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
317 idx++;
320 hw_desc_init(&desc[idx]);
321 set_cipher_mode(&desc[idx], hash_mode);
322 set_din_const(&desc[idx], 0, ctx->hash_len);
323 set_flow_mode(&desc[idx], S_DIN_to_HASH);
324 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
325 idx++;
328 hw_desc_init(&desc[idx]);
329 set_xor_val(&desc[idx], hmac_pad_const[i]);
330 set_cipher_mode(&desc[idx], hash_mode);
331 set_flow_mode(&desc[idx], S_DIN_to_HASH);
332 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
333 idx++;
336 hw_desc_init(&desc[idx]);
337 set_din_type(&desc[idx], DMA_DLLI,
340 set_cipher_mode(&desc[idx], hash_mode);
341 set_xor_active(&desc[idx]);
342 set_flow_mode(&desc[idx], DIN_HASH);
343 idx++;
346 hw_desc_init(&desc[idx]);
347 set_cipher_mode(&desc[idx], hash_mode);
348 set_dout_dlli(&desc[idx],
351 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
352 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
353 set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
354 idx++;
359 return idx;
421 unsigned int idx = 0;
456 hw_desc_init(&desc[idx]);
457 set_cipher_mode(&desc[idx], hashmode);
460 set_din_sram(&desc[idx], larval_addr, digestsize);
461 set_flow_mode(&desc[idx], S_DIN_to_HASH);
462 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
463 idx++;
466 hw_desc_init(&desc[idx]);
467 set_cipher_mode(&desc[idx], hashmode);
468 set_din_const(&desc[idx], 0, ctx->hash_len);
469 set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
470 set_flow_mode(&desc[idx], S_DIN_to_HASH);
471 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
472 idx++;
474 hw_desc_init(&desc[idx]);
475 set_din_type(&desc[idx], DMA_DLLI,
477 set_flow_mode(&desc[idx], DIN_HASH);
478 idx++;
481 hw_desc_init(&desc[idx]);
482 set_cipher_mode(&desc[idx], hashmode);
483 set_dout_dlli(&desc[idx], padded_authkey_dma_addr,
485 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
486 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
487 set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
488 set_cipher_config0(&desc[idx],
490 idx++;
492 hw_desc_init(&desc[idx]);
493 set_din_const(&desc[idx], 0, (blocksize - digestsize));
494 set_flow_mode(&desc[idx], BYPASS);
495 set_dout_dlli(&desc[idx], (padded_authkey_dma_addr +
498 idx++;
500 hw_desc_init(&desc[idx]);
501 set_din_type(&desc[idx], DMA_DLLI, key_dma_addr,
503 set_flow_mode(&desc[idx], BYPASS);
504 set_dout_dlli(&desc[idx], padded_authkey_dma_addr,
506 idx++;
509 hw_desc_init(&desc[idx]);
510 set_din_const(&desc[idx], 0,
512 set_flow_mode(&desc[idx], BYPASS);
513 set_dout_dlli(&desc[idx],
517 idx++;
521 hw_desc_init(&desc[idx]);
522 set_din_const(&desc[idx], 0, (blocksize - keylen));
523 set_flow_mode(&desc[idx], BYPASS);
524 set_dout_dlli(&desc[idx], padded_authkey_dma_addr,
526 idx++;
529 rc = cc_send_sync_request(ctx->drvdata, &cc_req, desc, idx);
728 unsigned int idx = *seq_size;
734 hw_desc_init(&desc[idx]);
735 set_din_type(&desc[idx], DMA_DLLI, sg_dma_address(areq->src),
737 set_flow_mode(&desc[idx], flow_mode);
740 set_din_not_last_indication(&desc[idx]);
744 hw_desc_init(&desc[idx]);
745 set_din_type(&desc[idx], DMA_MLLI, areq_ctx->assoc.sram_addr,
747 set_flow_mode(&desc[idx], flow_mode);
750 set_din_not_last_indication(&desc[idx]);
757 *seq_size = (++idx);
767 unsigned int idx = *seq_size;
783 hw_desc_init(&desc[idx]);
784 set_din_type(&desc[idx], DMA_DLLI,
787 set_flow_mode(&desc[idx], flow_mode);
810 hw_desc_init(&desc[idx]);
811 set_din_type(&desc[idx], DMA_MLLI, mlli_addr, mlli_nents,
813 set_flow_mode(&desc[idx], flow_mode);
821 *seq_size = (++idx);
829 unsigned int idx = *seq_size;
842 hw_desc_init(&desc[idx]);
843 set_din_type(&desc[idx], DMA_DLLI,
847 set_dout_dlli(&desc[idx],
851 set_flow_mode(&desc[idx], flow_mode);
855 hw_desc_init(&desc[idx]);
856 set_din_type(&desc[idx], DMA_MLLI, areq_ctx->src.sram_addr,
858 set_dout_mlli(&desc[idx], areq_ctx->dst.sram_addr,
860 set_flow_mode(&desc[idx], flow_mode);
867 *seq_size = (++idx);
877 unsigned int idx = *seq_size;
884 hw_desc_init(&desc[idx]);
885 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
886 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
887 set_dout_dlli(&desc[idx], req_ctx->icv_dma_addr, ctx->authsize,
889 set_queue_last_ind(ctx->drvdata, &desc[idx]);
891 set_aes_not_hash_mode(&desc[idx]);
892 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
894 set_cipher_config0(&desc[idx],
896 set_cipher_mode(&desc[idx], hash_mode);
900 hw_desc_init(&desc[idx]);
901 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
902 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
903 set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr,
905 set_queue_last_ind(ctx->drvdata, &desc[idx]);
906 set_cipher_config0(&desc[idx],
908 set_cipher_config1(&desc[idx], HASH_PADDING_DISABLED);
910 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
911 set_aes_not_hash_mode(&desc[idx]);
913 set_cipher_mode(&desc[idx], hash_mode);
917 *seq_size = (++idx);
928 unsigned int idx = *seq_size;
932 hw_desc_init(&desc[idx]);
933 set_cipher_config0(&desc[idx], direct);
934 set_flow_mode(&desc[idx], ctx->flow_mode);
935 set_din_type(&desc[idx], DMA_DLLI, req_ctx->gen_ctx.iv_dma_addr,
938 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
940 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
941 set_cipher_mode(&desc[idx], ctx->cipher_mode);
942 idx++;
945 hw_desc_init(&desc[idx]);
946 set_cipher_config0(&desc[idx], direct);
947 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
948 set_flow_mode(&desc[idx], ctx->flow_mode);
950 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
953 set_key_size_aes(&desc[idx], ctx->enc_keylen);
955 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
957 set_key_size_des(&desc[idx], ctx->enc_keylen);
959 set_cipher_mode(&desc[idx], ctx->cipher_mode);
960 idx++;
962 *seq_size = idx;
970 unsigned int idx = *seq_size;
975 cc_set_cipher_desc(req, desc, &idx);
976 cc_proc_cipher_desc(req, data_flow_mode, desc, &idx);
979 hw_desc_init(&desc[idx]);
980 set_din_no_dma(&desc[idx], 0, 0xfffff0);
981 set_dout_no_dma(&desc[idx], 0, 0, 1);
982 idx++;
985 *seq_size = idx;
997 unsigned int idx = *seq_size;
1000 hw_desc_init(&desc[idx]);
1001 set_cipher_mode(&desc[idx], hash_mode);
1002 set_din_type(&desc[idx], DMA_DLLI,
1005 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1006 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
1007 idx++;
1010 hw_desc_init(&desc[idx]);
1011 set_cipher_mode(&desc[idx], hash_mode);
1012 set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode),
1014 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1015 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1016 idx++;
1018 *seq_size = idx;
1026 unsigned int idx = *seq_size;
1029 hw_desc_init(&desc[idx]);
1030 set_din_const(&desc[idx], 0, CC_AES_BLOCK_SIZE);
1031 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
1032 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
1033 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1034 set_key_size_aes(&desc[idx], CC_AES_128_BIT_KEY_SIZE);
1035 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1036 set_aes_not_hash_mode(&desc[idx]);
1037 idx++;
1040 hw_desc_init(&desc[idx]);
1041 set_din_type(&desc[idx], DMA_DLLI,
1044 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1045 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
1046 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1047 set_key_size_aes(&desc[idx], CC_AES_128_BIT_KEY_SIZE);
1048 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1049 set_aes_not_hash_mode(&desc[idx]);
1050 idx++;
1053 hw_desc_init(&desc[idx]);
1054 set_din_type(&desc[idx], DMA_DLLI,
1057 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
1058 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
1059 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1060 set_key_size_aes(&desc[idx], CC_AES_128_BIT_KEY_SIZE);
1061 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1062 set_aes_not_hash_mode(&desc[idx]);
1063 idx++;
1066 hw_desc_init(&desc[idx]);
1067 set_din_type(&desc[idx], DMA_DLLI,
1070 set_setup_mode(&desc[idx], SETUP_LOAD_STATE2);
1071 set_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC);
1072 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1073 set_key_size_aes(&desc[idx], CC_AES_128_BIT_KEY_SIZE);
1074 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1075 set_aes_not_hash_mode(&desc[idx]);
1076 idx++;
1078 *seq_size = idx;
1086 unsigned int idx = *seq_size;
1090 cc_set_assoc_desc(req, DIN_HASH, desc, &idx);
1093 *seq_size = idx;
1107 unsigned int idx = *seq_size;
1109 hw_desc_init(&desc[idx]);
1110 set_cipher_mode(&desc[idx], hash_mode);
1111 set_dout_sram(&desc[idx], aead_handle->sram_workspace_addr,
1113 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
1114 set_setup_mode(&desc[idx], SETUP_WRITE_STATE1);
1115 set_cipher_do(&desc[idx], DO_PAD);
1116 idx++;
1119 hw_desc_init(&desc[idx]);
1120 set_dout_sram(&desc[idx], aead_handle->sram_workspace_addr,
1122 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
1123 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
1124 set_cipher_config0(&desc[idx], HASH_DIGEST_RESULT_LITTLE_ENDIAN);
1125 set_cipher_mode(&desc[idx], hash_mode);
1126 idx++;
1129 hw_desc_init(&desc[idx]);
1130 set_cipher_mode(&desc[idx], hash_mode);
1131 set_din_type(&desc[idx], DMA_DLLI,
1134 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1135 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
1136 idx++;
1139 hw_desc_init(&desc[idx]);
1140 set_cipher_mode(&desc[idx], hash_mode);
1141 set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode),
1143 set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
1144 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1145 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1146 idx++;
1149 hw_desc_init(&desc[idx]);
1150 set_din_sram(&desc[idx], aead_handle->sram_workspace_addr,
1152 set_flow_mode(&desc[idx], DIN_HASH);
1153 idx++;
1155 *seq_size = idx;
1415 unsigned int idx = *seq_size;
1428 hw_desc_init(&desc[idx]);
1429 set_cipher_mode(&desc[idx], DRV_CIPHER_CTR);
1430 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
1433 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1434 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1435 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1436 set_flow_mode(&desc[idx], S_DIN_to_AES);
1437 idx++;
1440 hw_desc_init(&desc[idx]);
1441 set_cipher_mode(&desc[idx], DRV_CIPHER_CTR);
1442 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1443 set_din_type(&desc[idx], DMA_DLLI,
1445 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1446 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
1447 set_flow_mode(&desc[idx], S_DIN_to_AES);
1448 idx++;
1451 hw_desc_init(&desc[idx]);
1452 set_cipher_mode(&desc[idx], DRV_CIPHER_CBC_MAC);
1453 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
1456 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1457 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1458 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1459 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1460 set_aes_not_hash_mode(&desc[idx]);
1461 idx++;
1464 hw_desc_init(&desc[idx]);
1465 set_cipher_mode(&desc[idx], DRV_CIPHER_CBC_MAC);
1466 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1467 set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
1469 set_cipher_config0(&desc[idx], DESC_DIRECTION_ENCRYPT_ENCRYPT);
1470 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
1471 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1472 set_aes_not_hash_mode(&desc[idx]);
1473 idx++;
1477 cc_set_assoc_desc(req, DIN_HASH, desc, &idx);
1479 hw_desc_init(&desc[idx]);
1480 set_din_type(&desc[idx], DMA_DLLI,
1483 set_flow_mode(&desc[idx], DIN_HASH);
1484 idx++;
1489 cc_proc_cipher_desc(req, cipher_flow_mode, desc, &idx);
1492 hw_desc_init(&desc[idx]);
1493 set_cipher_mode(&desc[idx], DRV_CIPHER_CBC_MAC);
1494 set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr, ctx->authsize,
1496 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
1497 set_cipher_config0(&desc[idx], HASH_DIGEST_RESULT_LITTLE_ENDIAN);
1498 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
1499 set_aes_not_hash_mode(&desc[idx]);
1500 idx++;
1503 hw_desc_init(&desc[idx]);
1504 set_cipher_mode(&desc[idx], DRV_CIPHER_CTR);
1505 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1506 set_din_type(&desc[idx], DMA_DLLI, req_ctx->ccm_iv0_dma_addr,
1508 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1509 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
1510 set_flow_mode(&desc[idx], S_DIN_to_AES);
1511 idx++;
1513 hw_desc_init(&desc[idx]);
1514 set_din_no_dma(&desc[idx], 0, 0xfffff0);
1515 set_dout_no_dma(&desc[idx], 0, 0, 1);
1516 idx++;
1519 hw_desc_init(&desc[idx]);
1520 set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
1522 set_dout_dlli(&desc[idx], mac_result, ctx->authsize, NS_BIT, 1);
1523 set_queue_last_ind(ctx->drvdata, &desc[idx]);
1524 set_flow_mode(&desc[idx], DIN_AES_DOUT);
1525 idx++;
1527 *seq_size = idx;
1619 unsigned int idx = *seq_size;
1622 hw_desc_init(&desc[idx]);
1623 set_cipher_mode(&desc[idx], DRV_CIPHER_ECB);
1624 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1625 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
1627 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1628 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1629 set_flow_mode(&desc[idx], S_DIN_to_AES);
1630 idx++;
1633 hw_desc_init(&desc[idx]);
1634 set_din_const(&desc[idx], 0x0, AES_BLOCK_SIZE);
1635 set_dout_dlli(&desc[idx], req_ctx->hkey_dma_addr, AES_BLOCK_SIZE,
1637 set_flow_mode(&desc[idx], DIN_AES_DOUT);
1638 idx++;
1641 hw_desc_init(&desc[idx]);
1642 set_din_no_dma(&desc[idx], 0, 0xfffff0);
1643 set_dout_no_dma(&desc[idx], 0, 0, 1);
1644 idx++;
1647 hw_desc_init(&desc[idx]);
1648 set_din_type(&desc[idx], DMA_DLLI, req_ctx->hkey_dma_addr,
1650 set_dout_no_dma(&desc[idx], 0, 0, 1);
1651 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1652 set_aes_not_hash_mode(&desc[idx]);
1653 set_cipher_mode(&desc[idx], DRV_HASH_HW_GHASH);
1654 set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
1655 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1656 idx++;
1663 hw_desc_init(&desc[idx]);
1664 set_din_no_dma(&desc[idx], 0, 0xfffff0);
1665 set_dout_no_dma(&desc[idx], 0, 0, 1);
1666 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1667 set_aes_not_hash_mode(&desc[idx]);
1668 set_cipher_mode(&desc[idx], DRV_HASH_HW_GHASH);
1669 set_cipher_do(&desc[idx], 1); //1=AES_SK RKEK
1670 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1671 set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
1672 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1673 idx++;
1678 hw_desc_init(&desc[idx]);
1679 set_din_const(&desc[idx], 0x0, AES_BLOCK_SIZE);
1680 set_dout_no_dma(&desc[idx], 0, 0, 1);
1681 set_flow_mode(&desc[idx], S_DIN_to_HASH);
1682 set_aes_not_hash_mode(&desc[idx]);
1683 set_cipher_mode(&desc[idx], DRV_HASH_HW_GHASH);
1684 set_cipher_config1(&desc[idx], HASH_PADDING_ENABLED);
1685 set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
1686 idx++;
1688 *seq_size = idx;
1697 unsigned int idx = *seq_size;
1700 hw_desc_init(&desc[idx]);
1701 set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
1702 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1703 set_din_type(&desc[idx], DMA_DLLI, ctx->enckey_dma_addr,
1705 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1706 set_setup_mode(&desc[idx], SETUP_LOAD_KEY0);
1707 set_flow_mode(&desc[idx], S_DIN_to_AES);
1708 idx++;
1712 hw_desc_init(&desc[idx]);
1713 set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
1714 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1715 set_din_type(&desc[idx], DMA_DLLI,
1718 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1719 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
1720 set_flow_mode(&desc[idx], S_DIN_to_AES);
1721 idx++;
1724 *seq_size = idx;
1735 unsigned int idx = *seq_size;
1744 hw_desc_init(&desc[idx]);
1745 set_din_type(&desc[idx], DMA_DLLI, req_ctx->gcm_block_len_dma_addr,
1747 set_flow_mode(&desc[idx], DIN_HASH);
1748 idx++;
1751 hw_desc_init(&desc[idx]);
1752 set_cipher_mode(&desc[idx], DRV_HASH_HW_GHASH);
1753 set_din_no_dma(&desc[idx], 0, 0xfffff0);
1754 set_dout_dlli(&desc[idx], req_ctx->mac_buf_dma_addr, AES_BLOCK_SIZE,
1756 set_setup_mode(&desc[idx], SETUP_WRITE_STATE0);
1757 set_flow_mode(&desc[idx], S_HASH_to_DOUT);
1758 set_aes_not_hash_mode(&desc[idx]);
1760 idx++;
1763 hw_desc_init(&desc[idx]);
1764 set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
1765 set_key_size_aes(&desc[idx], ctx->enc_keylen);
1766 set_din_type(&desc[idx], DMA_DLLI, req_ctx->gcm_iv_inc1_dma_addr,
1768 set_cipher_config0(&desc[idx], DRV_CRYPTO_DIRECTION_ENCRYPT);
1769 set_setup_mode(&desc[idx], SETUP_LOAD_STATE1);
1770 set_flow_mode(&desc[idx], S_DIN_to_AES);
1771 idx++;
1774 hw_desc_init(&desc[idx]);
1775 set_din_no_dma(&desc[idx], 0, 0xfffff0);
1776 set_dout_no_dma(&desc[idx], 0, 0, 1);
1777 idx++;
1780 hw_desc_init(&desc[idx]);
1781 set_cipher_mode(&desc[idx], DRV_CIPHER_GCTR);
1782 set_din_type(&desc[idx], DMA_DLLI, req_ctx->mac_buf_dma_addr,
1784 set_dout_dlli(&desc[idx], mac_result, ctx->authsize, NS_BIT, 1);
1785 set_queue_last_ind(ctx->drvdata, &desc[idx]);
1786 set_flow_mode(&desc[idx], DIN_AES_DOUT);
1787 idx++;
1789 *seq_size = idx;