Lines Matching defs:value
21 emu_ae.value = 0;
25 emu_se.value = 0;
30 nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value);
31 nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value);
50 emu_ge_int.value = 0;
53 emu_wd_int.value = 0;
58 nitrox_write_csr(ndev, offset, emu_wd_int.value);
60 nitrox_write_csr(ndev, offset, emu_ge_int.value);
73 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
75 nitrox_write_csr(ndev, offset, pkt_in_ctl.value);
80 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
88 pkt_in_cnts.value = nitrox_read_csr(ndev, offset);
89 nitrox_write_csr(ndev, offset, pkt_in_cnts.value);
101 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
104 nitrox_write_csr(ndev, offset, pkt_in_ctl.value);
108 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
141 pkt_in_rsize.value = 0;
143 nitrox_write_csr(ndev, offset, pkt_in_rsize.value);
151 pkt_in_dbell.value = 0;
153 nitrox_write_csr(ndev, offset, pkt_in_dbell.value);
169 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
171 nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);
177 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
185 pkt_slc_cnts.value = nitrox_read_csr(ndev, offset);
186 nitrox_write_csr(ndev, offset, pkt_slc_cnts.value);
197 pkt_slc_ctl.value = 0;
206 nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);
210 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
226 pkt_slc_int.value = 0;
229 nitrox_write_csr(ndev, offset, pkt_slc_int.value);
254 core_int.value = 0;
260 nitrox_write_csr(ndev, NPS_CORE_INT_ENA_W1S, core_int.value);
271 core_gbl_vfcfg.value = 0;
274 nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, core_gbl_vfcfg.value);
318 aqmq_en_reg.value = 0;
320 nitrox_write_csr(ndev, offset, aqmq_en_reg.value);
326 activity_stat.value = nitrox_read_csr(ndev, offset);
334 cmp_cnt.value = nitrox_read_csr(ndev, offset);
335 nitrox_write_csr(ndev, offset, cmp_cnt.value);
345 aqmq_en_reg.value = 0;
347 nitrox_write_csr(ndev, offset, aqmq_en_reg.value);
367 drbl.value = 0;
369 nitrox_write_csr(ndev, offset, drbl.value);
383 qsize.value = 0;
385 nitrox_write_csr(ndev, offset, qsize.value);
389 cmp_thr.value = 0;
391 nitrox_write_csr(ndev, offset, cmp_thr.value);
426 pom_int.value = 0;
428 nitrox_write_csr(ndev, POM_INT_ENA_W1S, pom_int.value);
445 efl_rnm_ctl.value = nitrox_read_csr(ndev, offset);
448 nitrox_write_csr(ndev, offset, efl_rnm_ctl.value);
461 efl_core_int.value = 0;
465 nitrox_write_csr(ndev, offset, efl_core_int.value);
482 bmi_ctl.value = nitrox_read_csr(ndev, offset);
486 nitrox_write_csr(ndev, offset, bmi_ctl.value);
490 bmi_int_ena.value = 0;
494 nitrox_write_csr(ndev, offset, bmi_int_ena.value);
504 bmo_ctl2.value = nitrox_read_csr(ndev, offset);
506 nitrox_write_csr(ndev, offset, bmo_ctl2.value);
518 lbc_ctl.value = nitrox_read_csr(ndev, offset);
520 nitrox_write_csr(ndev, offset, lbc_ctl.value);
524 lbc_stat.value = nitrox_read_csr(ndev, offset);
540 lbc_int_ena.value = 0;
545 nitrox_write_csr(ndev, offset, lbc_int_ena.value);
562 vfcfg.value = nitrox_read_csr(ndev, NPS_CORE_GBL_VFCFG);
565 nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, vfcfg.value);
618 rst_boot.value = nitrox_read_csr(ndev, offset);
623 emu_fuse.value = nitrox_read_csr(ndev, offset);
633 fus_dat1.value = nitrox_read_csr(ndev, offset);
654 u64 value = ~0ULL;
659 nitrox_write_csr(ndev, reg_addr, value);
663 nitrox_write_csr(ndev, reg_addr, value);
668 u64 value = ~0ULL;
673 nitrox_write_csr(ndev, reg_addr, value);
677 nitrox_write_csr(ndev, reg_addr, value);