Lines Matching defs:ring
64 static void reset_pkt_input_ring(struct nitrox_device *ndev, int ring)
71 /* step 1: disable the ring, clear enable bit */
72 offset = NPS_PKT_IN_INSTR_CTLX(ring);
87 offset = NPS_PKT_IN_DONE_CNTSX(ring);
93 void enable_pkt_input_ring(struct nitrox_device *ndev, int ring)
100 offset = NPS_PKT_IN_INSTR_CTLX(ring);
133 * configure ring base address 16-byte aligned,
139 /* configure ring size */
145 /* set high threshold for pkt input ring interrupts */
155 /* enable the ring */
288 /* NPS packet in ring interrupts */
308 static void reset_aqm_ring(struct nitrox_device *ndev, int ring)
317 offset = AQMQ_ENX(ring);
324 offset = AQMQ_ACTIVITY_STATX(ring);
333 offset = AQMQ_CMP_CNTX(ring);
339 void enable_aqm_ring(struct nitrox_device *ndev, int ring)
344 offset = AQMQ_ENX(ring);
353 int ring;
355 for (ring = 0; ring < ndev->nr_queues; ring++) {
356 struct nitrox_cmdq *cmdq = ndev->aqmq[ring];
363 reset_aqm_ring(ndev, ring);
365 /* step 4: clear doorbell count of ring */
366 offset = AQMQ_DRBLX(ring);
371 /* step 5: configure host ring details */
373 /* set host address for next command of ring */
374 offset = AQMQ_NXT_CMDX(ring);
377 /* set host address of ring base */
378 offset = AQMQ_BADRX(ring);
381 /* set ring size */
382 offset = AQMQ_QSZX(ring);
388 offset = AQMQ_CMP_THRX(ring);
394 enable_aqm_ring(ndev, ring);