Lines Matching refs:ret
64 int ret;
88 ret = regulator_set_voltage_tol(pu_reg, imx6_soc_volt[index], 0);
89 if (ret) {
90 dev_err(cpu_dev, "failed to scale vddpu up: %d\n", ret);
91 return ret;
94 ret = regulator_set_voltage_tol(soc_reg, imx6_soc_volt[index], 0);
95 if (ret) {
96 dev_err(cpu_dev, "failed to scale vddsoc up: %d\n", ret);
97 return ret;
99 ret = regulator_set_voltage_tol(arm_reg, volt, 0);
100 if (ret) {
102 "failed to scale vddarm up: %d\n", ret);
103 return ret;
155 ret = clk_set_rate(clks[ARM].clk, new_freq * 1000);
156 if (ret) {
159 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
164 return ret;
173 ret = regulator_set_voltage_tol(arm_reg, volt, 0);
174 if (ret)
176 "failed to scale vddarm down: %d\n", ret);
177 ret = regulator_set_voltage_tol(soc_reg, imx6_soc_volt[index], 0);
178 if (ret)
179 dev_warn(cpu_dev, "failed to scale vddsoc down: %d\n", ret);
181 ret = regulator_set_voltage_tol(pu_reg, imx6_soc_volt[index], 0);
182 if (ret)
183 dev_warn(cpu_dev, "failed to scale vddpu down: %d\n", ret);
214 int ret = dev_pm_opp_disable(dev, freq);
216 if (ret < 0 && ret != -ENODEV)
231 int ret;
234 ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
235 if (ret)
236 return ret;
286 int ret = 0;
289 ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
290 if (ret)
291 return ret;
337 return ret;
345 int num, ret;
368 ret = clk_bulk_get(cpu_dev, num_clks, clks);
369 if (ret)
378 ret = -EPROBE_DEFER;
384 ret = -ENOENT;
388 ret = dev_pm_opp_of_add_table(cpu_dev);
389 if (ret < 0) {
390 dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
396 ret = imx6ul_opp_check_speed_grading(cpu_dev);
398 ret = imx6q_opp_check_speed_grading(cpu_dev);
400 if (ret) {
401 if (ret != -EPROBE_DEFER)
403 ret);
409 ret = num;
410 dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
414 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
415 if (ret) {
416 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
424 ret = -ENOMEM;
469 ret = regulator_set_voltage_time(soc_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
470 if (ret > 0)
471 transition_latency += ret * 1000;
473 ret = regulator_set_voltage_time(pu_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
474 if (ret > 0)
475 transition_latency += ret * 1000;
492 ret = regulator_set_voltage_time(arm_reg, min_volt, max_volt);
493 if (ret > 0)
494 transition_latency += ret * 1000;
496 ret = cpufreq_register_driver(&imx6q_cpufreq_driver);
497 if (ret) {
498 dev_err(cpu_dev, "failed register driver: %d\n", ret);
521 return ret;