Lines Matching refs:base
132 static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base,
181 regmap_update_bits(base, reg, mask, val);
217 * When base CPU frequency is 1000 or 1200 MHz then there is additional
220 static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
227 if (base == NULL)
231 regmap_read(base, ARMADA_37XX_AVS_CTL0, &l0_vdd_min);
251 * Set the avs values for load L0 and L1 when base CPU frequency
284 * Fix the avs value for load L1 when base CPU frequency is 1000/1200 MHz,
304 static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,
310 if (base == NULL)
314 regmap_update_bits(base, ARMADA_37XX_AVS_CTL0,
319 regmap_update_bits(base, ARMADA_37XX_AVS_CTL2,
326 regmap_update_bits(base, ARMADA_37XX_AVS_VSET(load_level-1),
334 regmap_update_bits(base, ARMADA_37XX_AVS_CTL0,
340 static void armada37xx_cpufreq_disable_dvfs(struct regmap *base)
345 regmap_update_bits(base, reg, mask, 0);
348 static void __init armada37xx_cpufreq_enable_dvfs(struct regmap *base)
355 regmap_update_bits(base, reg, mask, val);
363 regmap_update_bits(base, reg, mask, mask);