Lines Matching refs:val
30 #define TIMER_IRQ_EN(val) BIT(val)
32 #define TIMER_CTL_REG(val) (0x10 * val + 0x10)
35 #define TIMER_CTL_CLK_SRC(val) (((val) & 0x3) << 2)
37 #define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4)
39 #define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14)
40 #define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18)
60 u32 val = readl(base + TIMER_CTL_REG(timer));
61 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));
74 u32 val = readl(base + TIMER_CTL_REG(timer));
77 val &= ~TIMER_CTL_ONESHOT;
79 val |= TIMER_CTL_ONESHOT;
81 writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
172 u32 val;
215 val = readl(timer_of_base(&to) + TIMER_IRQ_EN_REG);
216 writel(val | TIMER_IRQ_EN(0), timer_of_base(&to) + TIMER_IRQ_EN_REG);