Lines Matching defs:timer
2 * Allwinner A1X SoCs timer handling.
27 #include "timer-of.h"
45 * When we disable a timer, we need to wait at least for 2 cycles of
46 * the timer source clock. We will use for that the clocksource timer
58 static void sun4i_clkevt_time_stop(void __iomem *base, u8 timer)
60 u32 val = readl(base + TIMER_CTL_REG(timer));
61 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));
65 static void sun4i_clkevt_time_setup(void __iomem *base, u8 timer,
68 writel(delay, base + TIMER_INTVAL_REG(timer));
71 static void sun4i_clkevt_time_start(void __iomem *base, u8 timer,
74 u32 val = readl(base + TIMER_CTL_REG(timer));
82 base + TIMER_CTL_REG(timer));
205 /* Make sure timer is stopped before playing with interrupts */
220 TIMER_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
222 TIMER_OF_DECLARE(sun8i_a23, "allwinner,sun8i-a23-timer",
224 TIMER_OF_DECLARE(sun8i_v3s, "allwinner,sun8i-v3s-timer",
226 TIMER_OF_DECLARE(suniv, "allwinner,suniv-f1c100s-timer",