Lines Matching defs:rps
3 * drivers/clocksource/timer-oxnas-rps.c
62 struct oxnas_rps_timer *rps = dev_id;
64 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
66 rps->clkevent.event_handler(&rps->clkevent);
71 static void oxnas_rps_timer_config(struct oxnas_rps_timer *rps,
75 uint32_t cfg = rps->timer_prescaler;
83 writel_relaxed(period, rps->clkevt_base + TIMER_LOAD_REG);
84 writel_relaxed(cfg, rps->clkevt_base + TIMER_CTRL_REG);
89 struct oxnas_rps_timer *rps =
92 oxnas_rps_timer_config(rps, 0, 0);
99 struct oxnas_rps_timer *rps =
102 oxnas_rps_timer_config(rps, rps->timer_period, 1);
109 struct oxnas_rps_timer *rps =
112 oxnas_rps_timer_config(rps, rps->timer_period, 0);
120 struct oxnas_rps_timer *rps =
123 oxnas_rps_timer_config(rps, delta, 0);
128 static int __init oxnas_rps_clockevent_init(struct oxnas_rps_timer *rps)
130 ulong clk_rate = clk_get_rate(rps->clk);
134 rps->timer_prescaler = TIMER_DIV1;
135 rps->timer_period = DIV_ROUND_UP(clk_rate, HZ);
138 if (rps->timer_period > TIMER_MAX_VAL) {
139 rps->timer_prescaler = TIMER_DIV16;
141 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
143 if (rps->timer_period > TIMER_MAX_VAL) {
144 rps->timer_prescaler = TIMER_DIV256;
146 rps->timer_period = DIV_ROUND_UP(timer_rate, HZ);
149 rps->clkevent.name = "oxnas-rps";
150 rps->clkevent.features = CLOCK_EVT_FEAT_PERIODIC |
153 rps->clkevent.tick_resume = oxnas_rps_timer_shutdown;
154 rps->clkevent.set_state_shutdown = oxnas_rps_timer_shutdown;
155 rps->clkevent.set_state_periodic = oxnas_rps_timer_set_periodic;
156 rps->clkevent.set_state_oneshot = oxnas_rps_timer_set_oneshot;
157 rps->clkevent.set_next_event = oxnas_rps_timer_next_event;
158 rps->clkevent.rating = 200;
159 rps->clkevent.cpumask = cpu_possible_mask;
160 rps->clkevent.irq = rps->irq;
161 clockevents_config_and_register(&rps->clkevent,
168 rps->timer_prescaler,
169 rps->timer_period);
183 static int __init oxnas_rps_clocksource_init(struct oxnas_rps_timer *rps)
185 ulong clk_rate = clk_get_rate(rps->clk);
191 writel_relaxed(TIMER_MAX_VAL, rps->clksrc_base + TIMER_LOAD_REG);
193 rps->clksrc_base + TIMER_CTRL_REG);
195 timer_sched_base = rps->clksrc_base + TIMER_CURR_REG;
214 struct oxnas_rps_timer *rps;
218 rps = kzalloc(sizeof(*rps), GFP_KERNEL);
219 if (!rps)
222 rps->clk = of_clk_get(np, 0);
223 if (IS_ERR(rps->clk)) {
224 ret = PTR_ERR(rps->clk);
228 ret = clk_prepare_enable(rps->clk);
238 rps->irq = irq_of_parse_and_map(np, 0);
239 if (!rps->irq) {
244 rps->clkevt_base = base + TIMER1_REG_OFFSET;
245 rps->clksrc_base = base + TIMER2_REG_OFFSET;
248 writel_relaxed(0, rps->clkevt_base + TIMER_CTRL_REG);
249 writel_relaxed(0, rps->clksrc_base + TIMER_CTRL_REG);
250 writel_relaxed(0, rps->clkevt_base + TIMER_LOAD_REG);
251 writel_relaxed(0, rps->clksrc_base + TIMER_LOAD_REG);
252 writel_relaxed(0, rps->clkevt_base + TIMER_CLRINT_REG);
253 writel_relaxed(0, rps->clksrc_base + TIMER_CLRINT_REG);
255 ret = request_irq(rps->irq, oxnas_rps_timer_irq,
257 "rps-timer", rps);
261 ret = oxnas_rps_clocksource_init(rps);
265 ret = oxnas_rps_clockevent_init(rps);
272 free_irq(rps->irq, rps);
276 clk_disable_unprepare(rps->clk);
278 clk_put(rps->clk);
280 kfree(rps);
286 "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
288 "oxsemi,ox820-rps-timer", oxnas_rps_timer_init);