Lines Matching refs:clk_rate
190 static void __init mchp_pit64b_pres_compute(u32 *pres, u32 clk_rate,
196 tmp = clk_rate / (*pres + 1);
297 u32 clk_rate)
305 ret = clocksource_mmio_init(timer->base, MCHP_PIT64B_NAME, clk_rate,
317 sched_clock_register(mchp_pit64b_sched_read_clk, 64, clk_rate);
323 u32 clk_rate, u32 irq)
332 mchp_pit64b_ce_cycles = DIV_ROUND_CLOSEST(clk_rate, HZ);
357 clockevents_config_and_register(&ce->clkevt, clk_rate, 1, ULONG_MAX);
367 unsigned long clk_rate;
406 clk_rate = clk_get_rate(timer.gclk);
408 clk_rate = clk_get_rate(timer.pclk);
410 clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1);
413 ret = mchp_pit64b_init_clkevt(&timer, clk_rate, irq);
415 ret = mchp_pit64b_init_clksrc(&timer, clk_rate);