Lines Matching defs:base
52 * @base: base address of PIT64B hardware block
58 void __iomem *base;
83 static inline u64 mchp_pit64b_cnt_read(void __iomem *base)
95 low = readl_relaxed(base + MCHP_PIT64B_TLSBR);
96 high = readl_relaxed(base + MCHP_PIT64B_TMSBR);
111 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
112 writel_relaxed(mode | timer->mode, timer->base + MCHP_PIT64B_MR);
113 writel_relaxed(high, timer->base + MCHP_PIT64B_MSB_PR);
114 writel_relaxed(low, timer->base + MCHP_PIT64B_LSB_PR);
115 writel_relaxed(irqs, timer->base + MCHP_PIT64B_IER);
116 writel_relaxed(MCHP_PIT64B_CR_START, timer->base + MCHP_PIT64B_CR);
133 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
163 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
183 readl_relaxed(irq_data->timer.base + MCHP_PIT64B_ISR);
303 mchp_pit64b_cs_base = timer->base;
305 ret = clocksource_mmio_init(timer->base, MCHP_PIT64B_NAME, clk_rate,
312 timer->base + MCHP_PIT64B_CR);
334 ce->timer.base = timer->base;
380 timer.base = of_iomap(node, 0);
381 if (!timer.base)
430 iounmap(timer.base);