Lines Matching refs:val
27 #define GPT_IRQ_ENABLE(val) BIT((val) - 1)
29 #define GPT_IRQ_ACK(val) BIT((val) - 1)
31 #define GPT_CTRL_REG(val) (0x10 * (val))
32 #define GPT_CTRL_OP(val) (((val) & 0x3) << 4)
40 #define GPT_CLK_REG(val) (0x04 + (0x10 * (val)))
41 #define GPT_CLK_SRC(val) (((val) & 0x1) << 4)
47 #define GPT_CNT_REG(val) (0x08 + (0x10 * (val)))
48 #define GPT_CMP_REG(val) (0x0C + (0x10 * (val)))
137 u32 val;
139 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
140 writel(val & ~GPT_CTRL_ENABLE, timer_of_base(to) +
153 u32 val;
158 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
161 val &= ~GPT_CTRL_OP(0x3);
164 val |= GPT_CTRL_OP(GPT_CTRL_OP_REPEAT);
166 val |= GPT_CTRL_OP(GPT_CTRL_OP_ONESHOT);
168 writel(val | GPT_CTRL_ENABLE | GPT_CTRL_CLEAR,
231 u32 val;
239 val = readl(timer_of_base(to) + GPT_IRQ_EN_REG);
240 writel(val | GPT_IRQ_ENABLE(timer),