Lines Matching refs:timer_of_base
56 #define SYST_CON_REG(to) (timer_of_base(to) + SYST_CON)
57 #define SYST_VAL_REG(to) (timer_of_base(to) + SYST_VAL)
139 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
140 writel(val & ~GPT_CTRL_ENABLE, timer_of_base(to) +
147 writel(delay, timer_of_base(to) + GPT_CMP_REG(timer));
156 writel(GPT_IRQ_ACK(timer), timer_of_base(to) + GPT_IRQ_ACK_REG);
158 val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
169 timer_of_base(to) + GPT_CTRL_REG(timer));
208 writel(GPT_IRQ_ACK(TIMER_CLK_EVT), timer_of_base(to) + GPT_IRQ_ACK_REG);
218 timer_of_base(to) + GPT_CTRL_REG(timer));
221 timer_of_base(to) + GPT_CLK_REG(timer));
223 writel(0x0, timer_of_base(to) + GPT_CMP_REG(timer));
226 timer_of_base(to) + GPT_CTRL_REG(timer));
234 writel(0x0, timer_of_base(to) + GPT_IRQ_EN_REG);
237 writel(0x3f, timer_of_base(to) + GPT_IRQ_ACK_REG);
239 val = readl(timer_of_base(to) + GPT_IRQ_EN_REG);
241 timer_of_base(to) + GPT_IRQ_EN_REG);
297 clocksource_mmio_init(timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC),
300 gpt_sched_reg = timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC);