Lines Matching refs:tctl_val
294 u32 tctl_val;
296 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
297 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
303 u32 tctl_val;
305 tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
307 tctl_val |= V2_TCTL_CLK_OSC_DIV8;
309 tctl_val |= V2_TCTL_CLK_PER;
311 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
316 u32 tctl_val;
318 tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
320 tctl_val |= V2_TCTL_CLK_OSC_DIV8;
323 tctl_val |= V2_TCTL_24MEN;
325 tctl_val |= V2_TCTL_CLK_PER;
328 writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);