Lines Matching refs:cr
146 u32 cr;
159 cr = readl(fttmr010->base + TIMER1_COUNT);
160 writel(cr + cycles, fttmr010->base + TIMER1_MATCH1);
164 cr = readl(fttmr010->base + TIMER_CR);
165 cr |= fttmr010->t1_enable_val;
166 writel(cr, fttmr010->base + TIMER_CR);
184 u32 cr;
187 cr = readl(fttmr010->base + TIMER_CR);
188 cr &= ~fttmr010->t1_enable_val;
189 writel(cr, fttmr010->base + TIMER_CR);
197 u32 cr;
210 cr = readl(fttmr010->base + TIMER_INTR_MASK);
211 cr &= ~(TIMER_1_INT_OVERFLOW | TIMER_1_INT_MATCH2);
212 cr |= TIMER_1_INT_MATCH1;
213 writel(cr, fttmr010->base + TIMER_INTR_MASK);
223 u32 cr;
232 cr = 0xffffffff - (period - 1);
233 writel(cr, fttmr010->base + TIMER1_COUNT);
234 writel(cr, fttmr010->base + TIMER1_LOAD);
237 cr = readl(fttmr010->base + TIMER_INTR_MASK);
238 cr &= ~(TIMER_1_INT_MATCH1 | TIMER_1_INT_MATCH2);
239 cr |= TIMER_1_INT_OVERFLOW;
240 writel(cr, fttmr010->base + TIMER_INTR_MASK);
244 cr = readl(fttmr010->base + TIMER_CR);
245 cr |= fttmr010->t1_enable_val;
246 writel(cr, fttmr010->base + TIMER_CR);