Lines Matching refs:base
44 void __iomem *base;
53 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
62 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
67 ddata->base + TIMERn_CTRL);
76 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
77 writel_relaxed(ddata->periodic_top, ddata->base + TIMERn_TOP);
81 ddata->base + TIMERn_CTRL);
82 writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD);
92 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
93 writel_relaxed(evt, ddata->base + TIMERn_CNT);
94 writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD);
103 writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC);
125 void __iomem *base;
144 base = of_iomap(np, 0);
145 if (!base) {
153 TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL);
154 writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD);
156 ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer",
168 iounmap(base);
183 void __iomem *base;
203 base = of_iomap(np, 0);
204 if (!base) {
217 writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN);
219 clock_event_ddata.base = base;
238 iounmap(base);