Lines Matching refs:base
53 void __iomem *base;
63 void __iomem *base;
77 return readl_relaxed(clockevent->base + reg);
83 writel_relaxed(val, clockevent->base + reg);
86 static void davinci_tim12_shutdown(void __iomem *base)
100 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
103 static void davinci_tim12_set_oneshot(void __iomem *base)
113 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
122 davinci_tim12_shutdown(clockevent->base);
133 davinci_tim12_set_oneshot(clockevent->base);
174 davinci_tim12_shutdown(clockevent->base);
183 return readl_relaxed(davinci_clocksource.base +
197 static void davinci_clocksource_init_tim34(void __iomem *base)
206 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM34);
207 writel_relaxed(UINT_MAX, base + DAVINCI_TIMER_REG_PRD34);
208 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
216 static void davinci_clocksource_init_tim12(void __iomem *base)
223 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM12);
224 writel_relaxed(UINT_MAX, base + DAVINCI_TIMER_REG_PRD12);
225 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
228 static void davinci_timer_init(void __iomem *base)
231 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TCR);
237 base + DAVINCI_TIMER_REG_TGCR);
239 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM12);
240 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM34);
248 void __iomem *base;
265 base = ioremap(timer_cfg->reg.start, resource_size(&timer_cfg->reg));
266 if (!base) {
272 davinci_timer_init(base);
284 clockevent->base = base;
312 davinci_clocksource.base = base;
317 davinci_clocksource_init_tim12(base);
321 davinci_clocksource_init_tim34(base);
345 iounmap(base);