Lines Matching defs:bits
45 * Each channel occupies 4 bits in TCON register, but there is a gap of 4
46 * bits (one channel) after channel 0, so channels have different numbering
50 * in its set of bits is 2 as opposed to 3 for other channels.
106 u8 bits;
108 bits = (fls(divisor) - 1) - pwm.variant.div_base;
114 reg |= bits << shift;
350 pwm.variant.bits, clock_rate);
352 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
360 pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
361 if (pwm.variant.bits == 16) {
451 .bits = 16,
464 .bits = 32,
477 .bits = 32,
490 .bits = 32,