Lines Matching defs:tcu

13 #include <linux/mfd/ingenic-tcu.h>
24 #include <dt-bindings/clock/ingenic,tcu.h>
54 struct ingenic_tcu *tcu = ingenic_tcu;
57 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count);
82 struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
84 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));
93 struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
98 regmap_write(tcu->map, TCU_REG_TDFRc(timer->channel), next);
99 regmap_write(tcu->map, TCU_REG_TCNTc(timer->channel), 0);
100 regmap_write(tcu->map, TCU_REG_TESR, BIT(timer->channel));
115 struct ingenic_tcu *tcu = to_ingenic_tcu(timer);
118 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel));
143 struct ingenic_tcu *tcu = ingenic_tcu;
144 struct ingenic_tcu_timer *timer = &tcu->timers[cpu];
150 timer->clk = ingenic_tcu_get_clock(tcu->np, timer->channel);
164 domain = irq_find_host(tcu->np);
205 struct ingenic_tcu *tcu)
207 unsigned int channel = tcu->cs_channel;
208 struct clocksource *cs = &tcu->cs;
212 tcu->cs_clk = ingenic_tcu_get_clock(np, channel);
213 if (IS_ERR(tcu->cs_clk))
214 return PTR_ERR(tcu->cs_clk);
216 err = clk_prepare_enable(tcu->cs_clk);
220 rate = clk_get_rate(tcu->cs_clk);
227 regmap_update_bits(tcu->map, TCU_REG_TCSRc(channel),
231 regmap_write(tcu->map, TCU_REG_TDFRc(channel), 0xffff);
232 regmap_write(tcu->map, TCU_REG_TCNTc(channel), 0);
235 regmap_write(tcu->map, TCU_REG_TESR, BIT(channel));
250 clk_disable_unprepare(tcu->cs_clk);
252 clk_put(tcu->cs_clk);
265 { .compatible = "ingenic,jz4740-tcu", .data = &jz4740_soc_info, },
266 { .compatible = "ingenic,jz4725b-tcu", .data = &jz4725b_soc_info, },
267 { .compatible = "ingenic,jz4770-tcu", .data = &jz4740_soc_info, },
268 { .compatible = "ingenic,x1000-tcu", .data = &jz4740_soc_info, },
277 struct ingenic_tcu *tcu;
289 tcu = kzalloc(struct_size(tcu, timers, num_possible_cpus()),
291 if (!tcu)
298 tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1,
301 (u32 *)&tcu->pwm_channels_mask);
304 if (hweight8(tcu->pwm_channels_mask) >
307 tcu->pwm_channels_mask);
312 tcu->map = map;
313 tcu->np = np;
314 ingenic_tcu = tcu;
317 timer = &tcu->timers[cpu];
320 timer->channel = find_next_zero_bit(&tcu->pwm_channels_mask,
326 tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,
330 ret = ingenic_tcu_clocksource_init(np, tcu);
345 rate = clk_get_rate(tcu->cs_clk);
351 clocksource_unregister(&tcu->cs);
352 clk_disable_unprepare(tcu->cs_clk);
353 clk_put(tcu->cs_clk);
355 kfree(tcu);
359 TIMER_OF_DECLARE(jz4740_tcu_intc, "ingenic,jz4740-tcu", ingenic_tcu_init);
360 TIMER_OF_DECLARE(jz4725b_tcu_intc, "ingenic,jz4725b-tcu", ingenic_tcu_init);
361 TIMER_OF_DECLARE(jz4770_tcu_intc, "ingenic,jz4770-tcu", ingenic_tcu_init);
362 TIMER_OF_DECLARE(x1000_tcu_intc, "ingenic,x1000-tcu", ingenic_tcu_init);
373 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
376 clk_disable(tcu->cs_clk);
379 clk_disable(tcu->timers[cpu].clk);
386 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
391 ret = clk_enable(tcu->timers[cpu].clk);
396 ret = clk_enable(tcu->cs_clk);
404 clk_disable(tcu->timers[cpu - 1].clk);
416 .name = "ingenic-tcu-timer",