Lines Matching defs:access
92 void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val,
95 if (access == ARCH_TIMER_MEM_PHYS_ACCESS) {
105 } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) {
116 arch_timer_reg_write_cp15(access, reg, val);
121 u32 arch_timer_reg_read(int access, enum arch_timer_reg reg,
126 if (access == ARCH_TIMER_MEM_PHYS_ACCESS) {
136 } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) {
147 val = arch_timer_reg_read_cp15(access, reg);
174 * Default to cp15 based access because arm64 uses this function for
388 static void erratum_set_next_event_tval_generic(const int access, unsigned long evt,
394 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
398 if (access == ARCH_TIMER_PHYS_ACCESS) {
406 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
638 static __always_inline irqreturn_t timer_handler(const int access,
643 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, evt);
646 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
682 static __always_inline int timer_shutdown(const int access,
687 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
689 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
714 static __always_inline void set_next_event(const int access, unsigned long evt,
718 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
721 arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt, clk);
722 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
849 /* Disable user access to the timers and both counters */
858 * Enable user access to the virtual counter if it doesn't
863 pr_info("CPU%d: Trapping CNTVCT access\n", smp_processor_id());