clk.c - OpenGrok cross reference for /kernel/linux/linux-5.10/drivers/clk/zte/clk.c

Lines Matching defs:zx_pll
25 static int rate_to_idx(struct clk_zx_pll *zx_pll, unsigned long rate)
27 	const struct zx_pll_config *config = zx_pll->lookup_table;
30 	for (i = 0; i < zx_pll->count; i++) {
41 static int hw_to_idx(struct clk_zx_pll *zx_pll)
43 	const struct zx_pll_config *config = zx_pll->lookup_table;
47 	hw_cfg0 = readl_relaxed(zx_pll->reg_base);
48 	hw_cfg1 = readl_relaxed(zx_pll->reg_base + CFG0_CFG1_OFFSET);
51 	hw_cfg0 &= ~BIT(zx_pll->lock_bit);
54 	if (zx_pll->pd_bit < 32)
55 		hw_cfg0 |= BIT(zx_pll->pd_bit);
57 	for (i = 0; i < zx_pll->count; i++) {
68 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
71 	idx = hw_to_idx(zx_pll);
75 	return zx_pll->lookup_table[idx].rate;
81 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
84 	idx = rate_to_idx(zx_pll, rate);
86 	return zx_pll->lookup_table[idx].rate;
93 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
97 	idx = rate_to_idx(zx_pll, rate);
98 	config = &zx_pll->lookup_table[idx];
100 	writel_relaxed(config->cfg0, zx_pll->reg_base);
101 	writel_relaxed(config->cfg1, zx_pll->reg_base + CFG0_CFG1_OFFSET);
108 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
112 	if (zx_pll->pd_bit > 31)
115 	reg = readl_relaxed(zx_pll->reg_base);
116 	writel_relaxed(reg & ~BIT(zx_pll->pd_bit), zx_pll->reg_base);
118 	return readl_relaxed_poll_timeout(zx_pll->reg_base, reg,
119 					  reg & BIT(zx_pll->lock_bit), 0, 100);
124 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
127 	if (zx_pll->pd_bit > 31)
130 	reg = readl_relaxed(zx_pll->reg_base);
131 	writel_relaxed(reg | BIT(zx_pll->pd_bit), zx_pll->reg_base);
136 	struct clk_zx_pll *zx_pll = to_clk_zx_pll(hw);
139 	reg = readl_relaxed(zx_pll->reg_base);
141 	return !(reg & BIT(zx_pll->pd_bit));
159 	struct clk_zx_pll *zx_pll;
163 	zx_pll = kzalloc(sizeof(*zx_pll), GFP_KERNEL);
164 	if (!zx_pll)
173 	zx_pll->reg_base = reg_base;
174 	zx_pll->lookup_table = lookup_table;
175 	zx_pll->count = count;
176 	zx_pll->lock_bit = LOCK_FLAG;
177 	zx_pll->pd_bit = POWER_DOWN;
178 	zx_pll->lock = lock;
179 	zx_pll->hw.init = &init;
181 	clk = clk_register(NULL, &zx_pll->hw);
183 		kfree(zx_pll);