Lines Matching refs:zx_mux
211 static inline struct clk *zx_mux(const char *name, const char * const *parents,
283 zx_mux("matrix_aclk", matrix_aclk_sel,
308 zx_mux("a9_wclk", a9_wclk_sel, ARRAY_SIZE(a9_wclk_sel), CLK_MUX,
311 zx_mux("a9_as1_aclk_mux", a9_as1_aclk_sel,
314 zx_mux("a9_trace_clkin_mux", a9_trace_clkin_sel,
328 zx_mux("decppu_aclk_mux", decppu_aclk_sel,
331 zx_mux("ppu_aclk_mux", decppu_aclk_sel,
334 zx_mux("mali400_aclk_mux", decppu_aclk_sel,
337 zx_mux("vou_aclk_mux", decppu_aclk_sel,
340 zx_mux("vou_main_wclk_mux", vou_main_wclk_sel,
343 zx_mux("vou_aux_wclk_mux", vou_main_wclk_sel,
346 zx_mux("vou_scaler_wclk_mux", vou_scaler_wclk_sel,
350 zx_mux("r2d_aclk_mux", decppu_aclk_sel,
353 zx_mux("r2d_wclk_mux", r2d_wclk_sel,
376 zx_mux("ddr_wclk_mux", ddr_wclk_sel,
379 zx_mux("nand_wclk_mux", nand_wclk_sel,
382 zx_mux("lsp_26_wclk_mux", lsp_26_wclk_sel,
513 zx_mux("vl0_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
516 zx_mux("vl1_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
519 zx_mux("vl2_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
522 zx_mux("gl0_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
525 zx_mux("gl1_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
528 zx_mux("gl2_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
531 zx_mux("wb_mux", vl0_sel, ARRAY_SIZE(vl0_sel),
534 zx_mux("hdmi_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),
537 zx_mux("vou_tv_enc_hd_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),
540 zx_mux("vou_tv_enc_sd_mux", hdmi_sel, ARRAY_SIZE(hdmi_sel),
603 zx_mux("sdmmc1_wclk_mux", sdmmc1_wclk_sel,
617 zx_mux("spdif0_wclk_mux", spdif0_wclk_sel,
630 zx_mux("i2s0_wclk_mux", i2s_wclk_sel,
641 zx_mux("i2s1_wclk_mux", i2s_wclk_sel,
652 zx_mux("i2s2_wclk_mux", i2s_wclk_sel,
687 zx_mux("uart0_wclk_mux", uart_wclk_sel,
698 zx_mux("uart1_wclk_mux", uart_wclk_sel,
707 zx_mux("sdmmc0_wclk_mux", sdmmc0_wclk_sel,
717 zx_mux("spdif1_wclk_mux", spdif1_wclk_sel,