Lines Matching defs:CLK_EN0
28 #define CLK_EN0 (topcrm_base + 0x0c)
387 zx_gate("a9_as0_aclk", "matrix_aclk", CLK_EN0, 0);
389 zx_gate("a9_as1_aclk", "a9_as1_aclk_div", CLK_EN0, 1);
391 zx_gate("a9_trace_clkin", "a9_trace_clkin_mux", CLK_EN0, 2);
393 zx_gate("decppu_axi_m_aclk", "decppu_aclk_mux", CLK_EN0, 3);
395 zx_gate("decppu_ahb_s_hclk", "main_hclk", CLK_EN0, 4);
397 zx_gate("ppu_axi_m_aclk", "ppu_aclk_mux", CLK_EN0, 5);
399 zx_gate("ppu_ahb_s_hclk", "main_hclk", CLK_EN0, 6);
401 zx_gate("vou_axi_m_aclk", "vou_aclk_mux", CLK_EN0, 7);
403 zx_gate("vou_apb_pclk", "main_pclk", CLK_EN0, 8);
406 CLK_EN0, 9);
409 CLK_EN0, 10);
411 zx_gate("vou_hdmi_osclk_cec", "clk_2", CLK_EN0, 11);
413 zx_gate("vou_scaler_wclk", "vou_scaler_wclk_mux", CLK_EN0, 12);
415 zx_gate("mali400_axi_m_aclk", "mali400_aclk_mux", CLK_EN0, 13);
417 zx_gate("mali400_apb_pclk", "main_pclk", CLK_EN0, 14);
419 zx_gate("r2d_wclk", "r2d_wclk_mux", CLK_EN0, 15);
421 zx_gate("r2d_axi_m_aclk", "r2d_aclk_mux", CLK_EN0, 16);
423 zx_gate("r2d_ahb_hclk", "main_hclk", CLK_EN0, 17);
425 zx_gate("ddr3_axi_s0_aclk", "matrix_aclk", CLK_EN0, 18);
427 zx_gate("ddr3_apb_pclk", "main_pclk", CLK_EN0, 19);
429 zx_gate("ddr3_wclk", "ddr_wclk_mux", CLK_EN0, 20);
431 zx_gate("usb20_0_ahb_hclk", "main_hclk", CLK_EN0, 21);
433 zx_gate("usb20_0_extrefclk", "clk_12", CLK_EN0, 22);
435 zx_gate("usb20_1_ahb_hclk", "main_hclk", CLK_EN0, 23);
437 zx_gate("usb20_1_extrefclk", "clk_12", CLK_EN0, 24);
439 zx_gate("usb20_2_ahb_hclk", "main_hclk", CLK_EN0, 25);
441 zx_gate("usb20_2_extrefclk", "clk_12", CLK_EN0, 26);
443 zx_gate("gmac_axi_m_aclk", "matrix_aclk", CLK_EN0, 27);
445 zx_gate("gmac_apb_pclk", "main_pclk", CLK_EN0, 28);
447 zx_gate("gmac_125_clkin", "clk_125", CLK_EN0, 29);
449 zx_gate("gmac_rmii_clkin", "clk_50", CLK_EN0, 30);
451 zx_gate("gmac_25M_clk", "clk_25", CLK_EN0, 31);