Lines Matching defs:dd
80 * @dd: pointer to the dpll data structure
90 static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
94 fint = clk_hw_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);
95 fout = fint * dd->last_rounded_m;
98 dd->last_rounded_lpmode = 1;
100 dd->last_rounded_lpmode = 0;
118 struct dpll_data *dd;
123 dd = clk->dpll_data;
128 v = ti_clk_ll_ops->clk_readl(&dd->control_reg);
152 struct dpll_data *dd;
158 dd = clk->dpll_data;
160 dd->last_rounded_m4xen = 0;
180 dd->last_rounded_rate *= OMAP4430_REGM4XEN_MULT;
181 dd->last_rounded_m4xen = 1;
184 omap4_dpll_lpmode_recalc(dd);
186 return dd->last_rounded_rate;
203 struct dpll_data *dd;
208 dd = clk->dpll_data;
209 if (!dd)
212 if (clk_hw_get_rate(dd->clk_bypass) == req->rate &&
213 (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
214 req->best_parent_hw = dd->clk_bypass;
218 req->best_parent_hw = dd->clk_ref;