Lines Matching defs:node
137 struct device_node *node)
146 clk = of_clk_get(node, 0);
149 node);
150 if (!ti_clk_retry_init(node, hw, omap_clk_register_apll))
158 clk = of_clk_get(node, 1);
161 node);
162 if (!ti_clk_retry_init(node, hw, omap_clk_register_apll))
170 name = ti_dt_clk_name(node);
171 clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
173 of_clk_add_provider(node, of_clk_src_simple_get, clk);
186 static void __init of_dra7_apll_setup(struct device_node *node)
203 init->name = ti_dt_clk_name(node);
206 init->num_parents = of_clk_get_parent_count(node);
208 pr_err("dra7 apll %pOFn must have parent(s)\n", node);
216 of_clk_parent_fill(node, parent_names, init->num_parents);
220 ret = ti_clk_get_reg_addr(node, 0, &ad->control_reg);
221 ret |= ti_clk_get_reg_addr(node, 1, &ad->idlest_reg);
229 omap_clk_register_apll(&clk_hw->hw, node);
347 static void __init of_omap2_apll_setup(struct device_node *node)
368 name = ti_dt_clk_name(node);
372 init->num_parents = of_clk_get_parent_count(node);
374 pr_err("%pOFn must have one parent\n", node);
378 parent_name = of_clk_get_parent_name(node, 0);
381 if (of_property_read_u32(node, "ti,clock-frequency", &val)) {
382 pr_err("%pOFn missing clock-frequency\n", node);
387 if (of_property_read_u32(node, "ti,bit-shift", &val)) {
388 pr_err("%pOFn missing bit-shift\n", node);
396 if (of_property_read_u32(node, "ti,idlest-shift", &val)) {
397 pr_err("%pOFn missing idlest-shift\n", node);
403 ret = ti_clk_get_reg_addr(node, 0, &ad->control_reg);
404 ret |= ti_clk_get_reg_addr(node, 1, &ad->autoidle_reg);
405 ret |= ti_clk_get_reg_addr(node, 2, &ad->idlest_reg);
410 name = ti_dt_clk_name(node);
411 clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);
413 of_clk_add_provider(node, of_clk_src_simple_get, clk);